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Message-Id: <20240528-adding-new-ad738x-driver-v7-5-4cd70a4c12c8@baylibre.com>
Date: Tue, 28 May 2024 16:20:32 +0200
From: Julien Stephan <jstephan@...libre.com>
To: Lars-Peter Clausen <lars@...afoo.de>,
Michael Hennerich <Michael.Hennerich@...log.com>,
Nuno Sá <nuno.sa@...log.com>,
David Lechner <dlechner@...libre.com>, Jonathan Cameron <jic23@...nel.org>,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>, Liam Girdwood <lgirdwood@...il.com>,
Mark Brown <broonie@...nel.org>
Cc: kernel test robot <lkp@...el.com>, linux-iio@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
Julien Stephan <jstephan@...libre.com>
Subject: [PATCH v7 5/7] iio: adc: ad7380: prepare for parts with more
channels
The current driver supports only parts with 2 channels.
In order to prepare the support of new compatible ADCs with more
channels, this commit:
- defines MAX_NUM_CHANNEL to specify the maximum number of
channels currently supported by the driver
- adds available_scan_mask member in ad7380_chip_info structure
- fixes spi xfer struct len depending on number of channels
- fixes scan_data.raw buffer size to handle more channels
- adds a timing specifications structure in ad7380_chip_info structure
Signed-off-by: Julien Stephan <jstephan@...libre.com>
---
drivers/iio/adc/ad7380.c | 43 +++++++++++++++++++++++++++++++++----------
1 file changed, 33 insertions(+), 10 deletions(-)
diff --git a/drivers/iio/adc/ad7380.c b/drivers/iio/adc/ad7380.c
index 4ad283cf970d..790d08c90ad0 100644
--- a/drivers/iio/adc/ad7380.c
+++ b/drivers/iio/adc/ad7380.c
@@ -27,6 +27,7 @@
#include <linux/iio/trigger_consumer.h>
#include <linux/iio/triggered_buffer.h>
+#define MAX_NUM_CHANNELS 2
/* 2.5V internal reference voltage */
#define AD7380_INTERNAL_REF_MV 2500
@@ -63,12 +64,19 @@
#define AD7380_ALERT_LOW_TH GENMASK(11, 0)
#define AD7380_ALERT_HIGH_TH GENMASK(11, 0)
+#define T_CONVERT_NS 190 /* conversion time */
+struct ad7380_timing_specs {
+ const unsigned int t_csh_ns; /* CS minimum high time */
+};
+
struct ad7380_chip_info {
const char *name;
const struct iio_chan_spec *channels;
unsigned int num_channels;
const char * const *vcm_supplies;
unsigned int num_vcm_supplies;
+ const unsigned long *available_scan_masks;
+ const struct ad7380_timing_specs *timing_specs;
};
#define AD7380_CHANNEL(index, bits, diff) { \
@@ -113,16 +121,24 @@ static const unsigned long ad7380_2_channel_scan_masks[] = {
0
};
+static const struct ad7380_timing_specs ad7380_timing = {
+ .t_csh_ns = 10,
+};
+
static const struct ad7380_chip_info ad7380_chip_info = {
.name = "ad7380",
.channels = ad7380_channels,
.num_channels = ARRAY_SIZE(ad7380_channels),
+ .available_scan_masks = ad7380_2_channel_scan_masks,
+ .timing_specs = &ad7380_timing,
};
static const struct ad7380_chip_info ad7381_chip_info = {
.name = "ad7381",
.channels = ad7381_channels,
.num_channels = ARRAY_SIZE(ad7381_channels),
+ .available_scan_masks = ad7380_2_channel_scan_masks,
+ .timing_specs = &ad7380_timing,
};
static const struct ad7380_chip_info ad7383_chip_info = {
@@ -131,6 +147,8 @@ static const struct ad7380_chip_info ad7383_chip_info = {
.num_channels = ARRAY_SIZE(ad7383_channels),
.vcm_supplies = ad7380_2_channel_vcm_supplies,
.num_vcm_supplies = ARRAY_SIZE(ad7380_2_channel_vcm_supplies),
+ .available_scan_masks = ad7380_2_channel_scan_masks,
+ .timing_specs = &ad7380_timing,
};
static const struct ad7380_chip_info ad7384_chip_info = {
@@ -139,6 +157,8 @@ static const struct ad7380_chip_info ad7384_chip_info = {
.num_channels = ARRAY_SIZE(ad7384_channels),
.vcm_supplies = ad7380_2_channel_vcm_supplies,
.num_vcm_supplies = ARRAY_SIZE(ad7380_2_channel_vcm_supplies),
+ .available_scan_masks = ad7380_2_channel_scan_masks,
+ .timing_specs = &ad7380_timing,
};
struct ad7380_state {
@@ -146,15 +166,16 @@ struct ad7380_state {
struct spi_device *spi;
struct regmap *regmap;
unsigned int vref_mv;
- unsigned int vcm_mv[2];
+ unsigned int vcm_mv[MAX_NUM_CHANNELS];
/*
* DMA (thus cache coherency maintenance) requires the
* transfer buffers to live in their own cache lines.
- * Make the buffer large enough for 2 16-bit samples and one 64-bit
+ * Make the buffer large enough for MAX_NUM_CHANNELS 16-bit samples and one 64-bit
* aligned 64 bit timestamp.
+ * As MAX_NUM_CHANNELS is 2 the layout of the structure is the same for all parts
*/
struct {
- u16 raw[2];
+ u16 raw[MAX_NUM_CHANNELS];
s64 ts __aligned(8);
} scan_data __aligned(IIO_DMA_MINALIGN);
@@ -192,7 +213,7 @@ static int ad7380_regmap_reg_read(void *context, unsigned int reg,
.tx_buf = &st->tx,
.cs_change = 1,
.cs_change_delay = {
- .value = 10, /* t[CSH] */
+ .value = st->chip_info->timing_specs->t_csh_ns,
.unit = SPI_DELAY_UNIT_NSECS,
},
}, {
@@ -247,7 +268,8 @@ static irqreturn_t ad7380_trigger_handler(int irq, void *p)
struct ad7380_state *st = iio_priv(indio_dev);
struct spi_transfer xfer = {
.bits_per_word = st->chip_info->channels[0].scan_type.realbits,
- .len = 4,
+ .len = (st->chip_info->num_channels - 1) *
+ BITS_TO_BYTES(st->chip_info->channels->scan_type.storagebits),
.rx_buf = st->scan_data.raw,
};
int ret;
@@ -274,21 +296,22 @@ static int ad7380_read_direct(struct ad7380_state *st,
.speed_hz = AD7380_REG_WR_SPEED_HZ,
.bits_per_word = chan->scan_type.realbits,
.delay = {
- .value = 190, /* t[CONVERT] */
+ .value = T_CONVERT_NS,
.unit = SPI_DELAY_UNIT_NSECS,
},
.cs_change = 1,
.cs_change_delay = {
- .value = 10, /* t[CSH] */
+ .value = st->chip_info->timing_specs->t_csh_ns,
.unit = SPI_DELAY_UNIT_NSECS,
},
},
- /* then read both channels */
+ /* then read all channels */
{
.speed_hz = AD7380_REG_WR_SPEED_HZ,
.bits_per_word = chan->scan_type.realbits,
.rx_buf = st->scan_data.raw,
- .len = 4,
+ .len = (st->chip_info->num_channels - 1) *
+ ((chan->scan_type.storagebits > 16) ? 4 : 2),
},
};
int ret;
@@ -469,7 +492,7 @@ static int ad7380_probe(struct spi_device *spi)
indio_dev->name = st->chip_info->name;
indio_dev->info = &ad7380_info;
indio_dev->modes = INDIO_DIRECT_MODE;
- indio_dev->available_scan_masks = ad7380_2_channel_scan_masks;
+ indio_dev->available_scan_masks = st->chip_info->available_scan_masks;
ret = devm_iio_triggered_buffer_setup(&spi->dev, indio_dev,
iio_pollfunc_store_time,
--
2.44.0
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