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Message-ID: <c05c9dd5-0755-4f64-9935-824081766447@quicinc.com>
Date: Tue, 28 May 2024 11:00:57 +0800
From: Tengfei Fan <quic_tengfan@...cinc.com>
To: Bartosz Golaszewski <brgl@...ev.pl>,
Bjorn Andersson
<andersson@...nel.org>,
Mathieu Poirier <mathieu.poirier@...aro.org>,
Rob
Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor
Dooley <conor+dt@...nel.org>,
Konrad Dybcio <konrad.dybcio@...aro.org>,
Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>,
Jassi Brar
<jassisinghbrar@...il.com>
CC: Bartosz Golaszewski <bartosz.golaszewski@...aro.org>,
<linux-arm-msm@...r.kernel.org>, <linux-remoteproc@...r.kernel.org>,
<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
Srini
Kandagatla <srinivas.kandagatla@...aro.org>,
Alex Elder <elder@...nel.org>
Subject: Re: [PATCH v2 4/5] arm64: dts: qcom: sa8775p: add ADSP, CDSP and
GPDSP nodes
On 5/27/2024 4:43 PM, Bartosz Golaszewski wrote:
> From: Tengfei Fan <quic_tengfan@...cinc.com>
>
> Add nodes for remoteprocs: ADSP, CDSP0, CDSP1, GPDSP0 and GPDSP1 for
> SA8775p SoCs.
>
> Signed-off-by: Tengfei Fan <quic_tengfan@...cinc.com>
> Co-developed-by: Bartosz Golaszewski <bartosz.golaszewski@...aro.org>
> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@...aro.org>
> ---
> arch/arm64/boot/dts/qcom/sa8775p.dtsi | 332 ++++++++++++++++++++++++++++++++++
> 1 file changed, 332 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
> index 31de73594839..5c0b61a5624b 100644
> --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
> @@ -10,6 +10,7 @@
> #include <dt-bindings/clock/qcom,sa8775p-gpucc.h>
> #include <dt-bindings/interconnect/qcom,sa8775p-rpmh.h>
> #include <dt-bindings/mailbox/qcom-ipcc.h>
> +#include <dt-bindings/power/qcom,rpmhpd.h>
> #include <dt-bindings/power/qcom-rpmpd.h>
> #include <dt-bindings/soc/qcom,rpmh-rsc.h>
>
> @@ -544,6 +545,121 @@ cpucp_fw_mem: cpucp-fw@...00000 {
> };
> };
>
> + smp2p-adsp {
> + compatible = "qcom,smp2p";
> + qcom,smem = <443>, <429>;
> + interrupts-extended = <&ipcc IPCC_CLIENT_LPASS
> + IPCC_MPROC_SIGNAL_SMP2P
> + IRQ_TYPE_EDGE_RISING>;
> + mboxes = <&ipcc IPCC_CLIENT_LPASS IPCC_MPROC_SIGNAL_SMP2P>;
> +
> + qcom,local-pid = <0>;
> + qcom,remote-pid = <2>;
> +
> + smp2p_adsp_out: master-kernel {
> + qcom,entry-name = "master-kernel";
> + #qcom,smem-state-cells = <1>;
> + };
> +
> + smp2p_adsp_in: slave-kernel {
> + qcom,entry-name = "slave-kernel";
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> + };
> +
> + smp2p-cdsp0 {
> + compatible = "qcom,smp2p";
> + qcom,smem = <94>, <432>;
> + interrupts-extended = <&ipcc IPCC_CLIENT_CDSP
> + IPCC_MPROC_SIGNAL_SMP2P
> + IRQ_TYPE_EDGE_RISING>;
> + mboxes = <&ipcc IPCC_CLIENT_CDSP IPCC_MPROC_SIGNAL_SMP2P>;
> +
> + qcom,local-pid = <0>;
> + qcom,remote-pid = <5>;
> +
> + smp2p_cdsp0_out: master-kernel {
> + qcom,entry-name = "master-kernel";
> + #qcom,smem-state-cells = <1>;
> + };
> +
> + smp2p_cdsp0_in: slave-kernel {
> + qcom,entry-name = "slave-kernel";
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> + };
> +
> + smp2p-cdsp1 {
> + compatible = "qcom,smp2p";
> + qcom,smem = <617>, <616>;
> + interrupts-extended = <&ipcc IPCC_CLIENT_NSP1
> + IPCC_MPROC_SIGNAL_SMP2P
> + IRQ_TYPE_EDGE_RISING>;
> + mboxes = <&ipcc IPCC_CLIENT_NSP1 IPCC_MPROC_SIGNAL_SMP2P>;
> +
> + qcom,local-pid = <0>;
> + qcom,remote-pid = <12>;
> +
> + smp2p_cdsp1_out: master-kernel {
> + qcom,entry-name = "master-kernel";
> + #qcom,smem-state-cells = <1>;
> + };
> +
> + smp2p_cdsp1_in: slave-kernel {
> + qcom,entry-name = "slave-kernel";
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> + };
> +
> + smp2p-gpdsp0 {
> + compatible = "qcom,smp2p";
> + qcom,smem = <617>, <616>;
> + interrupts-extended = <&ipcc IPCC_CLIENT_GPDSP0
> + IPCC_MPROC_SIGNAL_SMP2P
> + IRQ_TYPE_EDGE_RISING>;
> + mboxes = <&ipcc IPCC_CLIENT_GPDSP0 IPCC_MPROC_SIGNAL_SMP2P>;
> +
> + qcom,local-pid = <0>;
> + qcom,remote-pid = <17>;
> +
> + smp2p_gpdsp0_out: master-kernel {
> + qcom,entry-name = "master-kernel";
> + #qcom,smem-state-cells = <1>;
> + };
> +
> + smp2p_gpdsp0_in: slave-kernel {
> + qcom,entry-name = "slave-kernel";
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> + };
> +
> + smp2p-gpdsp1 {
> + compatible = "qcom,smp2p";
> + qcom,smem = <617>, <616>;
> + interrupts-extended = <&ipcc IPCC_CLIENT_GPDSP1
> + IPCC_MPROC_SIGNAL_SMP2P
> + IRQ_TYPE_EDGE_RISING>;
> + mboxes = <&ipcc IPCC_CLIENT_GPDSP1 IPCC_MPROC_SIGNAL_SMP2P>;
> +
> + qcom,local-pid = <0>;
> + qcom,remote-pid = <18>;
> +
> + smp2p_gpdsp1_out: master-kernel {
> + qcom,entry-name = "master-kernel";
> + #qcom,smem-state-cells = <1>;
> + };
> +
> + smp2p_gpdsp1_in: slave-kernel {
> + qcom,entry-name = "slave-kernel";
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> + };
> +
> soc: soc@0 {
> compatible = "simple-bus";
> #address-cells = <2>;
> @@ -2479,6 +2595,92 @@ cpufreq_hw: cpufreq@...91000 {
> #freq-domain-cells = <1>;
> };
>
> + remoteproc_gpdsp0: remoteproc@...00000 {
> + compatible = "qcom,sa8775p-gpdsp0-pas";
> + reg = <0x0 0x20c00000 0x0 0x10000>;
> +
> + interrupts-extended = <&intc GIC_SPI 768 IRQ_TYPE_EDGE_RISING>,
> + <&smp2p_gpdsp0_in 0 0>,
> + <&smp2p_gpdsp0_in 2 0>,
> + <&smp2p_gpdsp0_in 1 0>,
> + <&smp2p_gpdsp0_in 3 0>;
> + interrupt-names = "wdog", "fatal", "ready",
> + "handover", "stop-ack";
> +
> + clocks = <&rpmhcc RPMH_CXO_CLK>;
> + clock-names = "xo";
> +
> + power-domains = <&rpmhpd RPMHPD_CX>,
> + <&rpmhpd RPMHPD_MXC>;
> + power-domain-names = "cx", "mxc";
> +
> + interconnects = <&gpdsp_anoc MASTER_DSP0 0
> + &config_noc SLAVE_CLK_CTL 0>;
> +
> + memory-region = <&pil_gdsp0_mem>;
> +
> + qcom,qmp = <&aoss_qmp>;
> +
> + qcom,smem-states = <&smp2p_gpdsp0_out 0>;
> + qcom,smem-state-names = "stop";
> +
> + status = "disabled";
> +
> + glink-edge {
> + interrupts-extended = <&ipcc IPCC_CLIENT_GPDSP0
> + IPCC_MPROC_SIGNAL_GLINK_QMP
> + IRQ_TYPE_EDGE_RISING>;
> + mboxes = <&ipcc IPCC_CLIENT_GPDSP0
> + IPCC_MPROC_SIGNAL_GLINK_QMP>;
> +
> + label = "gpdsp0";
> + qcom,remote-pid = <17>;
> + };
> + };
> +
> + remoteproc_gpdsp1: remoteproc@...00000 {
> + compatible = "qcom,sa8775p-gpdsp1-pas";
> + reg = <0x0 0x21c00000 0x0 0x10000>;
> +
> + interrupts-extended = <&intc GIC_SPI 624 IRQ_TYPE_EDGE_RISING>,
> + <&smp2p_gpdsp1_in 0 0>,
> + <&smp2p_gpdsp1_in 2 0>,
> + <&smp2p_gpdsp1_in 1 0>,
> + <&smp2p_gpdsp1_in 3 0>;
> + interrupt-names = "wdog", "fatal", "ready",
> + "handover", "stop-ack";
> +
> + clocks = <&rpmhcc RPMH_CXO_CLK>;
> + clock-names = "xo";
> +
> + power-domains = <&rpmhpd RPMHPD_CX>,
> + <&rpmhpd RPMHPD_MXC>;
> + power-domain-names = "cx", "mxc";
> +
> + interconnects = <&gpdsp_anoc MASTER_DSP1 0
> + &config_noc SLAVE_CLK_CTL 0>;
> +
> + memory-region = <&pil_gdsp1_mem>;
> +
> + qcom,qmp = <&aoss_qmp>;
> +
> + qcom,smem-states = <&smp2p_gpdsp1_out 0>;
> + qcom,smem-state-names = "stop";
> +
> + status = "disabled";
> +
> + glink-edge {
> + interrupts-extended = <&ipcc IPCC_CLIENT_GPDSP1
> + IPCC_MPROC_SIGNAL_GLINK_QMP
> + IRQ_TYPE_EDGE_RISING>;
> + mboxes = <&ipcc IPCC_CLIENT_GPDSP1
> + IPCC_MPROC_SIGNAL_GLINK_QMP>;
> +
> + label = "gpdsp1";
> + qcom,remote-pid = <18>;
> + };
> + };
> +
> ethernet1: ethernet@...00000 {
> compatible = "qcom,sa8775p-ethqos";
> reg = <0x0 0x23000000 0x0 0x10000>,
> @@ -2546,6 +2748,136 @@ ethernet0: ethernet@...40000 {
>
> status = "disabled";
> };
> +
> + remoteproc_cdsp0: remoteproc@...00000 {
> + compatible = "qcom,sa8775p-cdsp0-pas";
> + reg = <0x0 0x26300000 0x0 0x10000>;
> +
> + interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_EDGE_RISING>,
> + <&smp2p_cdsp0_in 0 IRQ_TYPE_EDGE_RISING>,
> + <&smp2p_cdsp0_in 2 IRQ_TYPE_EDGE_RISING>,
> + <&smp2p_cdsp0_in 1 IRQ_TYPE_EDGE_RISING>,
> + <&smp2p_cdsp0_in 3 IRQ_TYPE_EDGE_RISING>;
> + interrupt-names = "wdog", "fatal", "ready",
> + "handover", "stop-ack";
> +
> + clocks = <&rpmhcc RPMH_CXO_CLK>;
> + clock-names = "xo";
> +
> + power-domains = <&rpmhpd RPMHPD_CX>,
> + <&rpmhpd RPMHPD_MXC>,
> + <&rpmhpd RPMHPD_NSP0>;
> + power-domain-names = "cx", "mxc", "nsp0";
s/nsp0/nsp/
> +
> + interconnects = <&nspa_noc MASTER_CDSP_PROC 0
> + &mc_virt SLAVE_EBI1 0>;
> +
> + memory-region = <&pil_cdsp0_mem>;
> +
> + qcom,qmp = <&aoss_qmp>;
> +
> + qcom,smem-states = <&smp2p_cdsp0_out 0>;
> + qcom,smem-state-names = "stop";
> +
> + status = "disabled";
> +
> + glink-edge {
> + interrupts-extended = <&ipcc IPCC_CLIENT_CDSP
> + IPCC_MPROC_SIGNAL_GLINK_QMP
> + IRQ_TYPE_EDGE_RISING>;
> + mboxes = <&ipcc IPCC_CLIENT_CDSP
> + IPCC_MPROC_SIGNAL_GLINK_QMP>;
> +
> + label = "cdsp";
> + qcom,remote-pid = <5>;
> + };
> + };
> +
> + remoteproc_cdsp1: remoteproc@...00000 {
> + compatible = "qcom,sa8775p-cdsp1-pas";
> + reg = <0x0 0x2A300000 0x0 0x10000>;
> +
> + interrupts-extended = <&intc GIC_SPI 798 IRQ_TYPE_EDGE_RISING>,
> + <&smp2p_cdsp1_in 0 IRQ_TYPE_EDGE_RISING>,
> + <&smp2p_cdsp1_in 2 IRQ_TYPE_EDGE_RISING>,
> + <&smp2p_cdsp1_in 1 IRQ_TYPE_EDGE_RISING>,
> + <&smp2p_cdsp1_in 3 IRQ_TYPE_EDGE_RISING>;
> + interrupt-names = "wdog", "fatal", "ready",
> + "handover", "stop-ack";
> +
> + clocks = <&rpmhcc RPMH_CXO_CLK>;
> + clock-names = "xo";
> +
> + power-domains = <&rpmhpd RPMHPD_CX>,
> + <&rpmhpd RPMHPD_MXC>,
> + <&rpmhpd RPMHPD_NSP1>;
> + power-domain-names = "cx", "mxc", "nsp1";
s/nsp1/nsp/
> +
> + interconnects = <&nspb_noc MASTER_CDSP_PROC_B 0
> + &mc_virt SLAVE_EBI1 0>;
> +
> + memory-region = <&pil_cdsp1_mem>;
> +
> + qcom,qmp = <&aoss_qmp>;
> +
> + qcom,smem-states = <&smp2p_cdsp1_out 0>;
> + qcom,smem-state-names = "stop";
> +
> + status = "disabled";
> +
> + glink-edge {
> + interrupts-extended = <&ipcc IPCC_CLIENT_NSP1
> + IPCC_MPROC_SIGNAL_GLINK_QMP
> + IRQ_TYPE_EDGE_RISING>;
> + mboxes = <&ipcc IPCC_CLIENT_NSP1
> + IPCC_MPROC_SIGNAL_GLINK_QMP>;
> +
> + label = "cdsp1";
> + qcom,remote-pid = <12>;
> + };
> + };
> +
> + remoteproc_adsp: remoteproc@...00000 {
> + compatible = "qcom,sa8775p-adsp-pas";
> + reg = <0x0 0x30000000 0x0 0x100>;
> +
> + interrupts-extended = <&pdc 6 IRQ_TYPE_EDGE_RISING>,
> + <&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>,
> + <&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>,
> + <&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>,
> + <&smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING>;
> + interrupt-names = "wdog", "fatal", "ready", "handover",
> + "stop-ack";
> +
> + clocks = <&rpmhcc RPMH_CXO_CLK>;
> + clock-names = "xo";
> +
> + power-domains = <&rpmhpd RPMHPD_LCX>,
> + <&rpmhpd RPMHPD_LMX>;
> + power-domain-names = "lcx", "lmx";
> +
> + interconnects = <&lpass_ag_noc MASTER_LPASS_PROC 0 &mc_virt SLAVE_EBI1 0>;
> +
> + memory-region = <&pil_adsp_mem>;
> +
> + qcom,qmp = <&aoss_qmp>;
> +
> + qcom,smem-states = <&smp2p_adsp_out 0>;
> + qcom,smem-state-names = "stop";
> +
> + status = "disabled";
> +
> + remoteproc_adsp_glink: glink-edge {
> + interrupts-extended = <&ipcc IPCC_CLIENT_LPASS
> + IPCC_MPROC_SIGNAL_GLINK_QMP
> + IRQ_TYPE_EDGE_RISING>;
> + mboxes = <&ipcc IPCC_CLIENT_LPASS
> + IPCC_MPROC_SIGNAL_GLINK_QMP>;
> +
> + label = "lpass";
> + qcom,remote-pid = <2>;
> + };
> + };
> };
>
> thermal-zones {
>
--
Thx and BRs,
Tengfei Fan
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