linux-kernel - [PATCH v3 0/2] RISC-V: clarify what some RISCV_ISA* config options do & redo Zbb toolchain dependency

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Date: Tue, 28 May 2024 12:11:10 +0100
From: Conor Dooley <conor@...nel.org>
To: linux-riscv@...ts.infradead.org
Cc: conor@...nel.org,
	Conor Dooley <conor.dooley@...rochip.com>,
	xiao.w.wang@...el.com,
	Andrew Jones <ajones@...tanamicro.com>,
	pulehui@...wei.com,
	Charlie Jenkins <charlie@...osinc.com>,
	Paul Walmsley <paul.walmsley@...ive.com>,
	Palmer Dabbelt <palmer@...belt.com>,
	linux-kernel@...r.kernel.org,
	Samuel Holland <samuel.holland@...ive.com>,
	Pu Lehui <pulehui@...weicloud.com>,
	Björn Töpel <bjorn@...nel.org>
Subject: [PATCH v3 0/2] RISC-V: clarify what some RISCV_ISA* config options do & redo Zbb toolchain dependency

From: Conor Dooley <conor.dooley@...rochip.com>

Since one depends on the other, albeit trivially, here's a v2 of the Zbb
toolchain dep removal alongside the rewording of Kconfig options I'd
sent out before the merge window. I think I like this implementation
better than v1, but I couldn't think of a good name for a "public"
version of __ALTERNATIVE(), so I used it here directly.
Unfortunately "ALTERNATIVE_2_CFG" already exists and I couldn't think of
a good way to name an alternative macro that allows for several config
options that didn't make the distinction sufficiently clear.. Yell
if you have better suggestions than I did.

I am a wee bit "worried" that this makes the Kconfig option confusing as
it isn't immediately obvious if someone is or is not going to get the
toolchain based optimisations.

Cheers,
Conor.

CC: xiao.w.wang@...el.com
CC: Andrew Jones <ajones@...tanamicro.com>
CC: pulehui@...wei.com
CC: Charlie Jenkins <charlie@...osinc.com>
CC: Paul Walmsley <paul.walmsley@...ive.com>
CC: Palmer Dabbelt <palmer@...belt.com>
CC: Conor Dooley <conor.dooley@...rochip.com>
CC: linux-riscv@...ts.infradead.org
CC: linux-kernel@...r.kernel.org
CC: Samuel Holland <samuel.holland@...ive.com>
CC: Pu Lehui <pulehui@...weicloud.com>
CC: Björn Töpel <bjorn@...nel.org>
CC: Andrew Jones <ajones@...tanamicro.com>
CC: Paul Walmsley <paul.walmsley@...ive.com>
CC: Palmer Dabbelt <palmer@...belt.com>
CC: linux-riscv@...ts.infradead.org

Conor Dooley (2):
  RISC-V: clarify what some RISCV_ISA* config options do
  RISC-V: separate Zbb optimisations requiring and not requiring
    toolchain support

 arch/riscv/Kconfig                    | 38 ++++++++++++++-------------
 arch/riscv/include/asm/arch_hweight.h |  6 ++---
 arch/riscv/include/asm/bitops.h       |  4 +--
 arch/riscv/include/asm/checksum.h     |  3 +--
 arch/riscv/lib/csum.c                 | 21 +++------------
 arch/riscv/lib/strcmp.S               |  5 ++--
 arch/riscv/lib/strlen.S               |  5 ++--
 arch/riscv/lib/strncmp.S              |  5 ++--
 8 files changed, 38 insertions(+), 49 deletions(-)

-- 
2.43.0