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Message-ID: <8689fbcd-3fa3-410b-8fc9-7a699bf163b8@moroto.mountain>
Date: Wed, 29 May 2024 17:38:31 +0300
From: Dan Carpenter <dan.carpenter@...aro.org>
To: Matthias Schiffer <matthias.schiffer@...tq-group.com>
Cc: Linus Walleij <linus.walleij@...aro.org>,
Bartosz Golaszewski <brgl@...ev.pl>, Andrew Lunn <andrew@...n.ch>,
linux-gpio@...r.kernel.org, linux-kernel@...r.kernel.org,
Gregor Herburger <gregor.herburger@...group.com>,
linux@...tq-group.com
Subject: Re: [PATCH 8/8] gpio: tqmx86: fix broken IRQ_TYPE_EDGE_BOTH
interrupt type
On Wed, May 29, 2024 at 09:45:20AM +0200, Matthias Schiffer wrote:
> diff --git a/drivers/gpio/gpio-tqmx86.c b/drivers/gpio/gpio-tqmx86.c
> index c957be3341774..400415676ad5d 100644
> --- a/drivers/gpio/gpio-tqmx86.c
> +++ b/drivers/gpio/gpio-tqmx86.c
> @@ -126,9 +126,15 @@ static void _tqmx86_gpio_irq_config(struct tqmx86_gpio_data *gpio, int hwirq)
> unsigned int offset = hwirq - TQMX86_NGPO;
> u8 type = TQMX86_INT_TRIG_NONE, mask, val;
>
> - if (gpio->irq_type[hwirq] & TQMX86_INT_UNMASKED)
> + if (gpio->irq_type[hwirq] & TQMX86_INT_UNMASKED) {
> type = gpio->irq_type[hwirq] & TQMX86_INT_TRIG_MASK;
>
> + if (type == TQMX86_INT_TRIG_BOTH)
> + type = tqmx86_gpio_get(&gpio->chip, hwirq)
^^^^^
> + ? TQMX86_INT_TRIG_FALLING
> + : TQMX86_INT_TRIG_RISING;
> + }
> +
> mask = TQMX86_GPII_MASK(offset);
^^^^^^
> val = TQMX86_GPII_CONFIG(offset, type);
^^^^^^
> _tqmx86_gpio_update_bits(gpio, TQMX86_GPIIC, mask, val);
The offset stuff wasn't beautiful and I'm glad you are deleting it. My
understanding is that a hwirq is 0-3 for output or 4-7 input. An offset
is "hwirq % 4"?
There are a bunch of places which are still marked as taking an offset
but they all actually take a hwirq. For example, tqmx86_gpio_get()
above. The only things which still actually take an offset are the
TQMX86_GPII_MASK() and TQMX86_GPII_CONFIG() macros.
Could you:
1) Modify TQMX86_GPII_MASK() and TQMX86_GPII_CONFIG() to take a hwirq?
2) Rename all the "offset" variables to "hwirq"?
regards,
dan carpenter
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