| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-Id: <20240529-qcom-gdscs-v2-0-69c63d0ae1e7@linaro.org>
Date: Wed, 29 May 2024 17:46:58 +0300
From: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
To: Bjorn Andersson <andersson@...nel.org>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, Taniya Das <quic_tdas@...cinc.com>,
Robert Marko <robimarko@...il.com>,
Konrad Dybcio <konrad.dybcio@...aro.org>
Cc: linux-arm-msm@...r.kernel.org, linux-clk@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Subject: [PATCH v2 00/14] dt-bindings: clock: qcom,gcc: handle the
controllers without power domains
On some of the Qualcomm platforms the Global Clock Controller doesn't
provide power domains to the platform. However the existing
qcom,gcc.yaml common schema requires the '#power-domain-cells' property.
This results either in a platforms having incorrect property or in DT
validation errors. Fix this by splitting the qcom,gcc-nopd.yaml schema,
which doesn't define the offensive property and use it for such
platforms.
Also, while we are at it, fix GCC node name for two platforms and
enforce node name in the DT schema.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
---
Changes in v2:
- Rework schema solution, by moving required / false to individual
schema files (Krzysztof),
- Add even more platforms, which don't have power domains,
- Sort out MDM9607 and MDM9615 GCC schema.
- Link to v1: https://lore.kernel.org/r/20240528-qcom-gdscs-v1-0-03cf1b102a4f@linaro.org
---
Dmitry Baryshkov (14):
dt-bindings: clock: qcom,gcc-other: rename to qcom,mdm-mdm9607
dt-bindings: clock: qcom,gcc: sort out power-domains support
dt-bindings: clock: add schema for qcom,gcc-mdm9615
ARM: dts: qcom: apq8064: drop #power-domain-cells property of GCC
ARM: dts: qcom: msm8660: drop #power-domain-cells property of GCC
ARM: dts: qcom: msm8960: drop #power-domain-cells property of GCC
ARM: dts: qcom: ipq4019: drop #power-domain-cells property of GCC
ARM: dts: qcom: ipq8064: drop #power-domain-cells property of GCC
ARM: dts: qcom: mdm9615: drop #power-domain-cells property of GCC
arm64: dts: qcom: ipq5018: drop #power-domain-cells property of GCC
arm64: dts: qcom: ipq5332: drop #power-domain-cells property of GCC
arm64: dts: qcom: ipq9574: drop #power-domain-cells property of GCC
arm64: dts: qcom: ipq6018: fix GCC node name
arm64: dts: qcom: ipq8074: fix GCC node name
.../bindings/clock/qcom,gcc-apq8064.yaml | 3 +-
.../bindings/clock/qcom,gcc-apq8084.yaml | 1 +
.../bindings/clock/qcom,gcc-ipq4019.yaml | 3 +-
.../bindings/clock/qcom,gcc-ipq6018.yaml | 3 +-
.../bindings/clock/qcom,gcc-ipq8064.yaml | 3 +-
.../bindings/clock/qcom,gcc-ipq8074.yaml | 1 +
.../{qcom,gcc-other.yaml => qcom,gcc-mdm9607.yaml} | 4 +-
.../bindings/clock/qcom,gcc-mdm9615.yaml | 50 ++++++++++++++++++++++
.../bindings/clock/qcom,gcc-msm8660.yaml | 3 +-
.../bindings/clock/qcom,gcc-msm8909.yaml | 1 +
.../bindings/clock/qcom,gcc-msm8916.yaml | 1 +
.../bindings/clock/qcom,gcc-msm8953.yaml | 1 +
.../bindings/clock/qcom,gcc-msm8974.yaml | 1 +
.../bindings/clock/qcom,gcc-msm8976.yaml | 1 +
.../bindings/clock/qcom,gcc-msm8994.yaml | 1 +
.../bindings/clock/qcom,gcc-msm8996.yaml | 1 +
.../bindings/clock/qcom,gcc-msm8998.yaml | 1 +
.../bindings/clock/qcom,gcc-qcm2290.yaml | 1 +
.../devicetree/bindings/clock/qcom,gcc-qcs404.yaml | 1 +
.../devicetree/bindings/clock/qcom,gcc-sc7180.yaml | 1 +
.../devicetree/bindings/clock/qcom,gcc-sc7280.yaml | 1 +
.../bindings/clock/qcom,gcc-sc8180x.yaml | 1 +
.../bindings/clock/qcom,gcc-sc8280xp.yaml | 1 +
.../devicetree/bindings/clock/qcom,gcc-sdm660.yaml | 1 +
.../devicetree/bindings/clock/qcom,gcc-sdm845.yaml | 1 +
.../devicetree/bindings/clock/qcom,gcc-sdx55.yaml | 1 +
.../devicetree/bindings/clock/qcom,gcc-sdx65.yaml | 1 +
.../devicetree/bindings/clock/qcom,gcc-sm6115.yaml | 1 +
.../devicetree/bindings/clock/qcom,gcc-sm6125.yaml | 1 +
.../devicetree/bindings/clock/qcom,gcc-sm6350.yaml | 1 +
.../devicetree/bindings/clock/qcom,gcc-sm8150.yaml | 1 +
.../devicetree/bindings/clock/qcom,gcc-sm8250.yaml | 1 +
.../devicetree/bindings/clock/qcom,gcc-sm8350.yaml | 1 +
.../devicetree/bindings/clock/qcom,gcc-sm8450.yaml | 1 +
.../devicetree/bindings/clock/qcom,gcc.yaml | 1 -
.../bindings/clock/qcom,ipq5018-gcc.yaml | 3 +-
.../bindings/clock/qcom,ipq5332-gcc.yaml | 3 +-
.../bindings/clock/qcom,ipq9574-gcc.yaml | 3 +-
.../bindings/clock/qcom,qdu1000-gcc.yaml | 1 +
.../bindings/clock/qcom,sa8775p-gcc.yaml | 1 +
.../devicetree/bindings/clock/qcom,sdx75-gcc.yaml | 1 +
.../devicetree/bindings/clock/qcom,sm4450-gcc.yaml | 1 +
.../devicetree/bindings/clock/qcom,sm6375-gcc.yaml | 1 +
.../devicetree/bindings/clock/qcom,sm7150-gcc.yaml | 1 +
.../devicetree/bindings/clock/qcom,sm8550-gcc.yaml | 1 +
.../devicetree/bindings/clock/qcom,sm8650-gcc.yaml | 1 +
.../bindings/clock/qcom,x1e80100-gcc.yaml | 1 +
arch/arm/boot/dts/qcom/qcom-apq8064.dtsi | 1 -
arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi | 1 -
arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi | 1 -
arch/arm/boot/dts/qcom/qcom-mdm9615.dtsi | 1 -
arch/arm/boot/dts/qcom/qcom-msm8660.dtsi | 1 -
arch/arm/boot/dts/qcom/qcom-msm8960.dtsi | 1 -
arch/arm64/boot/dts/qcom/ipq5018.dtsi | 1 -
arch/arm64/boot/dts/qcom/ipq5332.dtsi | 1 -
arch/arm64/boot/dts/qcom/ipq6018.dtsi | 2 +-
arch/arm64/boot/dts/qcom/ipq8074.dtsi | 2 +-
arch/arm64/boot/dts/qcom/ipq9574.dtsi | 1 -
58 files changed, 106 insertions(+), 22 deletions(-)
---
base-commit: 5274c645b48141dd4e6f60ec7ff24ef143ec9952
change-id: 20240528-qcom-gdscs-b5e6cafdab9d
Best regards,
--
Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
Powered by blists - more mailing lists