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Date: Wed, 29 May 2024 08:07:14 +0200
From: Amna Waseem <Amna.Waseem@...s.com>
To: Jean Delvare <jdelvare@...e.com>, Guenter Roeck <linux@...ck-us.net>, "Rob
 Herring" <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, "Conor
 Dooley" <conor+dt@...nel.org>
CC: Krzysztof Kozlowski <krzk@...nel.org>, <linux-hwmon@...r.kernel.org>,
	<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>, Amna Waseem
	<Amna.Waseem@...s.com>, <kernel@...s.com>
Subject: [PATCH 1/2] dt-bindings: hwmon: ti,ina2xx: Add alert-polarity
 property

Add a property to the binding to configure the Alert Polarity.
Alert pin is asserted based on the value of Alert Polarity bit of
Mask/Enable register. It is by default 0 which means Alert pin is
configured to be active low. To configure it to active high, set
alert-polarity property value to 1.

Signed-off-by: Amna Waseem <Amna.Waseem@...s.com>
---
 Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml b/Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml
index df86c2c92037..a3f0fd71fcc6 100644
--- a/Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml
+++ b/Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml
@@ -66,6 +66,14 @@ properties:
     description: phandle to the regulator that provides the VS supply typically
       in range from 2.7 V to 5.5 V.
 
+  alert-polarity:
+    description: |
+      Alert polarity bit value of Mask/Enable register. Alert pin is asserted
+      based on the value of Alert polarity Bit. Default value is active low.
+      0 selects active low, 1 selects active high.
+    $ref: /schemas/types.yaml#/definitions/uint32
+    enum: [0, 1]
+
 required:
   - compatible
   - reg
@@ -88,5 +96,6 @@ examples:
             label = "vdd_3v0";
             shunt-resistor = <1000>;
             vs-supply = <&vdd_3v0>;
+            alert-polarity = <1>;
         };
     };

-- 
2.30.2


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