linux-kernel - Re: [PATCH 4/7] riscv: Implement xchg8/16() using Zabha

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Message-ID: <CAHVXubgBDxyow3-CFwBrkJ7xoAXCv8Tq7nNTAcvbzbA=TAaf5A@mail.gmail.com>
Date: Wed, 29 May 2024 10:04:14 +0200
From: Alexandre Ghiti <alexghiti@...osinc.com>
To: Andrea Parri <parri.andrea@...il.com>
Cc: Jonathan Corbet <corbet@....net>, Paul Walmsley <paul.walmsley@...ive.com>, 
	Palmer Dabbelt <palmer@...belt.com>, Albert Ou <aou@...s.berkeley.edu>, 
	Peter Zijlstra <peterz@...radead.org>, Ingo Molnar <mingo@...hat.com>, Will Deacon <will@...nel.org>, 
	Waiman Long <longman@...hat.com>, Boqun Feng <boqun.feng@...il.com>, Arnd Bergmann <arnd@...db.de>, 
	Leonardo Bras <leobras@...hat.com>, Guo Ren <guoren@...nel.org>, linux-doc@...r.kernel.org, 
	linux-kernel@...r.kernel.org, linux-riscv@...ts.infradead.org, 
	linux-arch@...r.kernel.org
Subject: Re: [PATCH 4/7] riscv: Implement xchg8/16() using Zabha

Hi Andrea,

On Tue, May 28, 2024 at 8:00 PM Andrea Parri <parri.andrea@...il.com> wrote:
>
> > -#define __arch_xchg_masked(prepend, append, r, p, n)                 \
> > +#define __arch_xchg_masked(swap_sfx, prepend, append, r, p, n)               \
>
> This actually indicates a problem in the current (aka, no Zabha)
> implementation: without your series, xchg16() gets mapped to
>
>   lr.w     a2,(a3)
>   and      a1,a2,a5
>   or       a1,a1,a4
>   sc.w     a1,a1,(a3)
>   bnez     a1,43c <.L0^B1>
>
> which is clearly wrong... (other "fully-ordered LR/SC sequences"
> instead follow the mapping
>
>   lr.w     a2,(a3)
>   and      a1,a2,a5
>   or       a1,a1,a4
>   sc.w.rl  a1,a1,(a3)
>   bnez     a1,43c <.L0^B1>
>   fence    rw,rw  )
>
> A similar consideration for xchg8().

Ok, I will fix that separately and make it merged in -rc2.

Thanks,

Akex

>
>   Andrea