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Message-ID: <CAMuHMdV5jcbiHzYx=nqFHLLZ96u614zksSB5Vi9FVaOb_YMeiQ@mail.gmail.com>
Date: Thu, 30 May 2024 09:06:54 +0200
From: Geert Uytterhoeven <geert@...ux-m68k.org>
To: Samuel Holland <samuel.holland@...ive.com>
Cc: Anup Patel <apatel@...tanamicro.com>, devicetree@...r.kernel.org, 
	Conor Dooley <conor+dt@...nel.org>, Emil Renner Berthing <kernel@...il.dk>, 
	Saravana Kannan <saravanak@...gle.com>, Marc Zyngier <maz@...nel.org>, Anup Patel <anup@...infault.org>, 
	Atish Patra <atishp@...shpatra.org>, linux-kernel@...r.kernel.org, 
	Björn Töpel <bjorn@...nel.org>, 
	Rob Herring <robh+dt@...nel.org>, Palmer Dabbelt <palmer@...belt.com>, 
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>, 
	Paul Walmsley <paul.walmsley@...ive.com>, Thomas Gleixner <tglx@...utronix.de>, 
	Frank Rowand <frowand.list@...il.com>, linux-riscv@...ts.infradead.org, 
	linux-arm-kernel@...ts.infradead.org, Andrew Jones <ajones@...tanamicro.com>
Subject: Re: [PATCH v14 01/18] irqchip/sifive-plic: Convert PLIC driver into a
 platform driver

Hi Samuel,

On Thu, May 30, 2024 at 12:04 AM Samuel Holland
<samuel.holland@...ive.com> wrote:
> On 2024-05-29 9:22 AM, Geert Uytterhoeven wrote:
> > On Thu, Feb 22, 2024 at 10:41 AM Anup Patel <apatel@...tanamicro.com> wrote:
> >> The PLIC driver does not require very early initialization so convert
> >> it into a platform driver.
> >>
> >> After conversion, the PLIC driver is probed after CPUs are brought-up
> >> so setup cpuhp state after context handler of all online CPUs are
> >> initialized otherwise PLIC driver crashes for platforms with multiple
> >> PLIC instances.
> >>
> >> Signed-off-by: Anup Patel <apatel@...tanamicro.com>
> >
> > Thanks for your patch, which is now commit 8ec99b033147ef3b
> > ("irqchip/sifive-plic: Convert PLIC driver into a platform
> > driver") in v6.9.
> >
> > It looks like this conversion is causing issues on BeagleV Starlight
> > Beta.  After updating esmil/visionfive to v6.10-rc1, the kernel usually
> > fails to boot. Adding "earlycon keep_bootcon" reveals these differences:
> >
> > -riscv-plic c000000.interrupt-controller: mapped 133 interrupts with 2
> > handlers for 4 contexts.
> > +------------[ cut here ]------------
> > +WARNING: CPU: 0 PID: 1 at drivers/irqchip/irq-sifive-plic.c:373

> > +Unable to handle kernel NULL pointer dereference at virtual address

> The fact that you hit the warning indicates that plic_handle_irq() was called
> before handler->present was set. Previously the PLIC driver was probed very
> early, so it is unlikely that some peripheral already had a pending interrupt.
> Now, while platform device drivers would not yet be able to request interrupts
> (because the irqdomain is not registered yet), they could have programmed the
> hardware in a way that generates an interrupt. If that interrupt was enabled at
> the PLIC (e.g. by the bootloader), then we could expect plic_handle_irq() to be
> called as soon as irq_set_chained_handler() is called.
>
> So the fix is to not call irq_set_chained_handler() until after the handlers are
> completely set up.
>
> I've sent a patch doing this:
> https://lore.kernel.org/linux-riscv/20240529215458.937817-1-samuel.holland@sifive.com/

Thanks, that fixed the issue!

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68korg

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

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