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Message-ID: <20240530093621.1925863-7-a-bhatia1@ti.com>
Date: Thu, 30 May 2024 15:06:18 +0530
From: Aradhya Bhatia <a-bhatia1@...com>
To: Tomi Valkeinen <tomi.valkeinen@...asonboard.com>,
Andrzej Hajda
<andrzej.hajda@...el.com>,
Neil Armstrong <neil.armstrong@...aro.org>,
Robert
Foss <rfoss@...nel.org>,
Laurent Pinchart
<Laurent.pinchart@...asonboard.com>,
Jonas Karlman <jonas@...boo.se>,
Jernej
Skrabec <jernej.skrabec@...il.com>,
Maarten Lankhorst
<maarten.lankhorst@...ux.intel.com>,
Maxime Ripard <mripard@...nel.org>, Jyri
Sarha <jyri.sarha@....fi>,
Thomas Zimmermann <tzimmermann@...e.de>,
David
Airlie <airlied@...il.com>, Daniel Vetter <daniel@...ll.ch>
CC: DRI Development List <dri-devel@...ts.freedesktop.org>,
Linux Kernel List
<linux-kernel@...r.kernel.org>,
Sam Ravnborg <sam@...nborg.org>, Thierry
Reding <treding@...dia.com>,
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<kieran.bingham+renesas@...asonboard.com>,
Nishanth Menon <nm@...com>, Vignesh Raghavendra <vigneshr@...com>,
Praneeth Bajjuri <praneeth@...com>, Udit Kumar <u-kumar1@...com>,
Devarsh Thakkar <devarsht@...com>,
Jayesh
Choudhary <j-choudhary@...com>, Jai Luthra <j-luthra@...com>,
Aradhya Bhatia
<a-bhatia1@...com>
Subject: [PATCH v2 6/9] drm/bridge: cdns-dsi: Reset the DCS write FIFO
Allow the DCS Write FIFO in the cdns-dsi controller to reset before any
DCS packet is transmitted to the DSI sink device.
The DCS FIFO reset is optional. Not all panels require it. But at
least one of the DSI based panel that uses Ilitek ILI9881C (DSI to DPI
bridge) doesn't work with without this reset.
Signed-off-by: Aradhya Bhatia <a-bhatia1@...com>
---
drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c b/drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c
index 05d2f4cc50da..87fdd07ca0bc 100644
--- a/drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c
+++ b/drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c
@@ -1037,6 +1037,9 @@ static ssize_t cdns_dsi_transfer(struct mipi_dsi_host *host,
cdns_dsi_init_link(dsi);
+ /* Reset the DCS Write FIFO */
+ writel(0x00, dsi->regs + DIRECT_CMD_FIFO_RST);
+
ret = mipi_dsi_create_packet(&packet, msg);
if (ret)
goto out;
--
2.34.1
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