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Message-ID: <20240530164816.1051-1-hnagalla@ti.com>
Date: Thu, 30 May 2024 11:48:16 -0500
From: Hari Nagalla <hnagalla@...com>
To: <andersson@...nel.org>, <mathieu.poirier@...aro.org>, <robh+dt@...nel.org>,
<devarsht@...com>, <s-anna@...com>,
<krzysztof.kozlowski+dt@...aro.org>, <conor+dt@...nel.org>
CC: <linux-remoteproc@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>, <devicetree@...r.kernel.org>
Subject: [PATCH v2] dt-bindings: remoteproc: k3-dsp: correct optional sram properties for AM62A SoCs
The C7xv-dsp on AM62A have 32KB L1 I-cache and a 64KB L1 D-cache. It
does not have an addressable l1dram . So, remove this optional sram
property from the bindings to fix device tree build warnings.
Signed-off-by: Hari Nagalla <hnagalla@...com>
---
Changes from v1 to v2:
*) Kept back memory-regions property, as it is unrelated to this patch
correcting the sram property for AM62A C7xv-dsp nodes.
DT binding check log:
https://paste.sr.ht/~hnagalla/cb26237560a572a17c0874b687353e00b400285a
v1: https://lore.kernel.org/all/20230810110545.11644-1-hnagalla@ti.com/
.../bindings/remoteproc/ti,k3-dsp-rproc.yaml | 15 ++++++++++++++-
1 file changed, 14 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/remoteproc/ti,k3-dsp-rproc.yaml b/Documentation/devicetree/bindings/remoteproc/ti,k3-dsp-rproc.yaml
index 9768db8663eb..771cfceb5458 100644
--- a/Documentation/devicetree/bindings/remoteproc/ti,k3-dsp-rproc.yaml
+++ b/Documentation/devicetree/bindings/remoteproc/ti,k3-dsp-rproc.yaml
@@ -111,7 +111,6 @@ else:
properties:
compatible:
enum:
- - ti,am62a-c7xv-dsp
- ti,j721e-c71-dsp
- ti,j721s2-c71-dsp
then:
@@ -124,6 +123,20 @@ else:
items:
- const: l2sram
- const: l1dram
+ else:
+ if:
+ properties:
+ compatible:
+ enum:
+ - ti,am62a-c7xv-dsp
+ then:
+ properties:
+ reg:
+ items:
+ - description: Address and Size of the L2 SRAM internal memory region
+ reg-names:
+ items:
+ - const: l2sram
required:
- compatible
--
2.34.1
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