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Message-ID: <CAJF2gTRu8WUkjOOzH4MZvinZv=0cgF988c7HyzP5jw0p3w+MWQ@mail.gmail.com>
Date: Fri, 31 May 2024 09:43:00 +0800
From: Guo Ren <guoren@...nel.org>
To: Inochi Amaoto <inochiama@...look.com>
Cc: Jisheng Zhang <jszhang@...nel.org>, Fu Wei <wefu@...hat.com>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>,
Paul Walmsley <paul.walmsley@...ive.com>, Palmer Dabbelt <palmer@...belt.com>,
Albert Ou <aou@...s.berkeley.edu>, linux-riscv@...ts.infradead.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] riscv: dts: thead: th1520: Add PMU event node
On Thu, May 30, 2024 at 7:19 PM Inochi Amaoto <inochiama@...look.com> wrote:
>
> T-HEAD th1520 uses standard C910 chip and its pmu is already supported
> by OpenSBI.
>
> Add the pmu event description for T-HEAD th1520 SoC.
>
> Signed-off-by: Inochi Amaoto <inochiama@...look.com>
> Link: https://www.xrvm.com/product/xuantie/4240217381324001280?spm=xrvm27140568.0.0.7f979b29nzIa1m
> ---
> arch/riscv/boot/dts/thead/th1520.dtsi | 81 +++++++++++++++++++++++++++
> 1 file changed, 81 insertions(+)
>
> diff --git a/arch/riscv/boot/dts/thead/th1520.dtsi b/arch/riscv/boot/dts/thead/th1520.dtsi
> index d2fa25839012..3c9974062c20 100644
> --- a/arch/riscv/boot/dts/thead/th1520.dtsi
> +++ b/arch/riscv/boot/dts/thead/th1520.dtsi
> @@ -122,6 +122,87 @@ l2_cache: l2-cache {
> };
> };
>
> + pmu {
> + compatible = "riscv,pmu";
> + riscv,event-to-mhpmcounters =
> + <0x00003 0x00003 0x0007fff8>,
> + <0x00004 0x00004 0x0007fff8>,
> + <0x00005 0x00005 0x0007fff8>,
> + <0x00006 0x00006 0x0007fff8>,
> + <0x00007 0x00007 0x0007fff8>,
> + <0x00008 0x00008 0x0007fff8>,
> + <0x00009 0x00009 0x0007fff8>,
> + <0x0000a 0x0000a 0x0007fff8>,
> + <0x10000 0x10000 0x0007fff8>,
> + <0x10001 0x10001 0x0007fff8>,
> + <0x10002 0x10002 0x0007fff8>,
> + <0x10003 0x10003 0x0007fff8>,
> + <0x10010 0x10010 0x0007fff8>,
> + <0x10011 0x10011 0x0007fff8>,
> + <0x10012 0x10012 0x0007fff8>,
> + <0x10013 0x10013 0x0007fff8>;
> + riscv,event-to-mhpmevent =
> + <0x00003 0x00000000 0x00000001>,
> + <0x00004 0x00000000 0x00000002>,
> + <0x00006 0x00000000 0x00000006>,
> + <0x00005 0x00000000 0x00000007>,
> + <0x00007 0x00000000 0x00000008>,
> + <0x00008 0x00000000 0x00000009>,
> + <0x00009 0x00000000 0x0000000a>,
> + <0x0000a 0x00000000 0x0000000b>,
> + <0x10000 0x00000000 0x0000000c>,
> + <0x10001 0x00000000 0x0000000d>,
> + <0x10002 0x00000000 0x0000000e>,
> + <0x10003 0x00000000 0x0000000f>,
> + <0x10010 0x00000000 0x00000010>,
> + <0x10011 0x00000000 0x00000011>,
> + <0x10012 0x00000000 0x00000012>,
> + <0x10013 0x00000000 0x00000013>;
> + riscv,raw-event-to-mhpmcounters =
> + <0x00000000 0x00000001 0xffffffff 0xffffffff 0x0007fff8>,
> + <0x00000000 0x00000002 0xffffffff 0xffffffff 0x0007fff8>,
> + <0x00000000 0x00000003 0xffffffff 0xffffffff 0x0007fff8>,
> + <0x00000000 0x00000004 0xffffffff 0xffffffff 0x0007fff8>,
> + <0x00000000 0x00000005 0xffffffff 0xffffffff 0x0007fff8>,
> + <0x00000000 0x00000006 0xffffffff 0xffffffff 0x0007fff8>,
> + <0x00000000 0x00000007 0xffffffff 0xffffffff 0x0007fff8>,
> + <0x00000000 0x00000008 0xffffffff 0xffffffff 0x0007fff8>,
> + <0x00000000 0x00000009 0xffffffff 0xffffffff 0x0007fff8>,
> + <0x00000000 0x0000000a 0xffffffff 0xffffffff 0x0007fff8>,
> + <0x00000000 0x0000000b 0xffffffff 0xffffffff 0x0007fff8>,
> + <0x00000000 0x0000000c 0xffffffff 0xffffffff 0x0007fff8>,
> + <0x00000000 0x0000000d 0xffffffff 0xffffffff 0x0007fff8>,
> + <0x00000000 0x0000000e 0xffffffff 0xffffffff 0x0007fff8>,
> + <0x00000000 0x0000000f 0xffffffff 0xffffffff 0x0007fff8>,
> + <0x00000000 0x00000010 0xffffffff 0xffffffff 0x0007fff8>,
> + <0x00000000 0x00000011 0xffffffff 0xffffffff 0x0007fff8>,
> + <0x00000000 0x00000012 0xffffffff 0xffffffff 0x0007fff8>,
> + <0x00000000 0x00000013 0xffffffff 0xffffffff 0x0007fff8>,
> + <0x00000000 0x00000014 0xffffffff 0xffffffff 0x0007fff8>,
> + <0x00000000 0x00000015 0xffffffff 0xffffffff 0x0007fff8>,
> + <0x00000000 0x00000016 0xffffffff 0xffffffff 0x0007fff8>,
> + <0x00000000 0x00000017 0xffffffff 0xffffffff 0x0007fff8>,
> + <0x00000000 0x00000018 0xffffffff 0xffffffff 0x0007fff8>,
> + <0x00000000 0x00000019 0xffffffff 0xffffffff 0x0007fff8>,
> + <0x00000000 0x0000001a 0xffffffff 0xffffffff 0x0007fff8>,
> + <0x00000000 0x0000001b 0xffffffff 0xffffffff 0x0007fff8>,
> + <0x00000000 0x0000001c 0xffffffff 0xffffffff 0x0007fff8>,
> + <0x00000000 0x0000001d 0xffffffff 0xffffffff 0x0007fff8>,
> + <0x00000000 0x0000001e 0xffffffff 0xffffffff 0x0007fff8>,
> + <0x00000000 0x0000001f 0xffffffff 0xffffffff 0x0007fff8>,
> + <0x00000000 0x00000020 0xffffffff 0xffffffff 0x0007fff8>,
> + <0x00000000 0x00000021 0xffffffff 0xffffffff 0x0007fff8>,
> + <0x00000000 0x00000022 0xffffffff 0xffffffff 0x0007fff8>,
> + <0x00000000 0x00000023 0xffffffff 0xffffffff 0x0007fff8>,
> + <0x00000000 0x00000024 0xffffffff 0xffffffff 0x0007fff8>,
> + <0x00000000 0x00000025 0xffffffff 0xffffffff 0x0007fff8>,
> + <0x00000000 0x00000026 0xffffffff 0xffffffff 0x0007fff8>,
> + <0x00000000 0x00000027 0xffffffff 0xffffffff 0x0007fff8>,
> + <0x00000000 0x00000028 0xffffffff 0xffffffff 0x0007fff8>,
> + <0x00000000 0x00000029 0xffffffff 0xffffffff 0x0007fff8>,
> + <0x00000000 0x0000002a 0xffffffff 0xffffffff 0x0007fff8>;
> + };
> +
> osc: oscillator {
> compatible = "fixed-clock";
> clock-output-names = "osc_24m";
> --
> 2.45.1
>
LGTM! Reviewed-by: Guo Ren <guoren@...nel.org>
--
Best Regards
Guo Ren
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