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Message-ID: <ed5754fa-29c9-4a3e-b961-decadfcd7fc9@linaro.org>
Date: Fri, 31 May 2024 14:40:24 +0200
From: Konrad Dybcio <konrad.dybcio@...aro.org>
To: Bartosz Golaszewski <brgl@...ev.pl>
Cc: Bjorn Andersson <andersson@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
<conor+dt@...nel.org>, Robert Marko <robimarko@...il.com>,
Das Srinagesh <quic_gurus@...cinc.com>,
Bartosz Golaszewski <bartosz.golaszewski@...aro.org>,
Maximilian Luz <luzmaximilian@...il.com>,
Catalin Marinas <catalin.marinas@....com>, Will Deacon <will@...nel.org>,
Srini Kandagatla <srinivas.kandagatla@...aro.org>,
Arnd Bergmann <arnd@...db.de>, Elliot Berman <quic_eberman@...cinc.com>,
Alex Elder <elder@...nel.org>, linux-arm-msm@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, kernel@...cinc.com
Subject: Re: [PATCH v10 15/15] arm64: dts: qcom: sa8775p: add a dedicated
memory carveout for TZ
On 29.05.2024 4:39 PM, Bartosz Golaszewski wrote:
> On Wed, May 29, 2024 at 4:26 PM Konrad Dybcio <konrad.dybcio@...aro.org> wrote:
>>
>> On 27.05.2024 2:55 PM, Bartosz Golaszewski wrote:
>>> From: Bartosz Golaszewski <bartosz.golaszewski@...aro.org>
>>>
>>> Add a 20MB reserved memory region for use by SCM calls.
>>>
>>> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@...aro.org>
>>> ---
>>> arch/arm64/boot/dts/qcom/sa8775p.dtsi | 7 +++++++
>>> 1 file changed, 7 insertions(+)
>>>
>>> diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
>>> index 31de73594839..c183527452d7 100644
>>> --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi
>>> +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
>>> @@ -208,6 +208,7 @@ core3 {
>>> firmware {
>>> scm {
>>> compatible = "qcom,scm-sa8775p", "qcom,scm";
>>> + memory-region = <&tz_ffi_mem>;
>>> };
>>> };
>>>
>>> @@ -418,6 +419,12 @@ cdt_data_backup_mem: cdt-data-backup@...a0000 {
>>> no-map;
>>> };
>>>
>>> + tz_ffi_mem: tz-ffi@...00000 {
>>> + compatible = "shared-dma-pool";
>>> + reg = <0x0 0x91c00000 0x0 0x1400000>;
>>
>> How does that size relate to
>>
>> + pool_config.max_size = SZ_256K;
>>
>> in patch 3?
>>
>> Konrad
>
> Short answer: it doesn't.
>
> Slightly less short answer: this is the limit of *this* specific TZMem
> pool which in turn gets its memory from the shared DMA pool. We can
> have multiple TZMem pools and they all share this DMA pool.
OK makes sense, thanks
Konrad
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