linux-kernel - Re: [PATCH 1/2] dt-bindings: hwmon: ti,ina2xx: Add alert-polarity property

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Message-ID: <588c68da-1129-43e2-89a9-4edbabfd018b@roeck-us.net>
Date: Mon, 3 Jun 2024 15:44:32 -0700
From: Guenter Roeck <linux@...ck-us.net>
To: Rob Herring <robh@...nel.org>, Amna Waseem <Amna.Waseem@...s.com>
Cc: Jean Delvare <jdelvare@...e.com>, Krzysztof Kozlowski
 <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>,
 Krzysztof Kozlowski <krzk@...nel.org>, linux-hwmon@...r.kernel.org,
 devicetree@...r.kernel.org, linux-kernel@...r.kernel.org, kernel@...s.com
Subject: Re: [PATCH 1/2] dt-bindings: hwmon: ti,ina2xx: Add alert-polarity
 property

On 6/3/24 08:47, Rob Herring wrote:
> On Wed, May 29, 2024 at 08:07:14AM +0200, Amna Waseem wrote:
>> Add a property to the binding to configure the Alert Polarity.
>> Alert pin is asserted based on the value of Alert Polarity bit of
>> Mask/Enable register. It is by default 0 which means Alert pin is
>> configured to be active low. To configure it to active high, set
>> alert-polarity property value to 1.
>>
>> Signed-off-by: Amna Waseem <Amna.Waseem@...s.com>
>> ---
>>   Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml | 9 +++++++++
>>   1 file changed, 9 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml b/Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml
>> index df86c2c92037..a3f0fd71fcc6 100644
>> --- a/Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml
>> +++ b/Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml
>> @@ -66,6 +66,14 @@ properties:
>>       description: phandle to the regulator that provides the VS supply typically
>>         in range from 2.7 V to 5.5 V.
>>   
>> +  alert-polarity:
>> +    description: |
>> +      Alert polarity bit value of Mask/Enable register. Alert pin is asserted
>> +      based on the value of Alert polarity Bit. Default value is active low.
>> +      0 selects active low, 1 selects active high.
>> +    $ref: /schemas/types.yaml#/definitions/uint32
>> +    enum: [0, 1]
> 
> This is alert as in SMBus Alert? That's handled as an interrupt, but
> this binding has no interrupt property. And the interrupt binding
> provides a way already to specify active trigger state. Why do we need a
> second way to do this?
> 

SMBus alert is a single interrupt/alert line for all chips in a single I2C/SMBus.
it is handled by drivers/i2c/i2c-smbus.c. It can not be handled by an individual
driver since it affects all chips on a single bus. A driver supporting it
is supposed to implement an alert callback in struct i2c_driver.

The signal is supposed to be active-low open collector. Some chips, such as this
series, make it configurable; in this case the alternative is active-high open
collector. Presumably there is some wiring to attach it to the active-low open
collector SMBus interrupt signal.

Having said this, I don't really know what the use case is for this driver.
It doesn't implement an alert callback, and it doesn't implement an interrupt
handler either (after all, it might be conceivable that the alert signal _is_
connected to a dedicated interrupt line). So your question is fair - with neither
SMBus alert nor interrupt support by the driver, the alert signal polarity should
not really matter.

Thanks,
Guenter