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Message-ID: <Zl2O+eJF9vOTqFx2@shell.armlinux.org.uk>
Date: Mon, 3 Jun 2024 10:38:01 +0100
From: "Russell King (Oracle)" <linux@...linux.org.uk>
To: Christophe Roullier <christophe.roullier@...s.st.com>
Cc: "David S . Miller" <davem@...emloft.net>,
	Eric Dumazet <edumazet@...gle.com>,
	Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
	Rob Herring <robh+dt@...nel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
	Conor Dooley <conor+dt@...nel.org>,
	Maxime Coquelin <mcoquelin.stm32@...il.com>,
	Alexandre Torgue <alexandre.torgue@...s.st.com>,
	Richard Cochran <richardcochran@...il.com>,
	Jose Abreu <joabreu@...opsys.com>,
	Liam Girdwood <lgirdwood@...il.com>,
	Mark Brown <broonie@...nel.org>, Marek Vasut <marex@...x.de>,
	netdev@...r.kernel.org, devicetree@...r.kernel.org,
	linux-stm32@...md-mailman.stormreply.com,
	linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 02/11] net: stmmac: dwmac-stm32: Separate out external
 clock rate validation

On Mon, Jun 03, 2024 at 11:27:48AM +0200, Christophe Roullier wrote:
> +static int stm32mp1_validate_ethck_rate(struct plat_stmmacenet_data *plat_dat)
> +{
> +	struct stm32_dwmac *dwmac = plat_dat->bsp_priv;
> +	const u32 clk_rate = clk_get_rate(dwmac->clk_eth_ck);
> +
> +	switch (plat_dat->mac_interface) {

Should these be phy_interface? Does this clock depend on the interface
mode used with the PHY?

-- 
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
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