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Message-ID: <e632a9ed-7659-9336-6e7f-a43c4759a7a3@huawei.com>
Date: Mon, 3 Jun 2024 11:26:39 +0800
From: "Liao, Chang" <liaochang1@...wei.com>
To: Mark Brown <broonie@...nel.org>
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Subject: Re: [PATCH v3 1/8] arm64/sysreg: Add definitions for immediate
versions of MSR ALLINT
Hi, Mark
在 2024/5/7 22:52, Mark Brown 写道:
> On Tue, May 07, 2024 at 03:41:08PM +0800, Liao, Chang wrote:
>> 在 2024/5/6 23:15, Mark Brown 写道:
>>> On Fri, May 03, 2024 at 05:00:49PM +0100, Mark Rutland wrote:
>
>>>> +#define set_pstate_allint(x) asm volatile(SET_PSTATE_ALLINT(x))
>
>>> Hrm, those helpers are not ideally discoverable, partly due to the
>>> system register description for ALLINT not providing any references to
>>> this being a general scheme (which is fixable there) and partly due to
>
>> Based on the Arm ISA reference manual, the instruction accessing the ALLINT
>> field of PSTATE uses the following encoding:
>
> I'm not saying the suggestion is wrong, I'm saying that between the ARM
> and the way the code is written the helpers aren't as discoverable as
> they should be, like I say from a code point of view that's mainly
> because...
>
>> op0 op1 CRn CRm op2
>> MSR ALLINT, #<imm> 0b00 0b001 0b0100 0b000x 0b000
>
> ...we only have the encoding for the MSR and don't mention the letters
> 'msr' anywhere. We should improve that to say what we're encoding in
> the code (in general I'd say that's true for any __emit_inst(), not just
> these ones).
Oh, I apologize any confusion in my previous message.
Mark, Is your concern is that the series of pstate related macro name in
sysregs.h are lack of self-explanatory nature, which make it diffuclt to
understand their functionality and purpose? If so, I daft some alternative
macro names in the code below, looking forward to your feedback, or if you
have any proposal for making these helpers discoverable.
----8<----
diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index 643e2ad73cbd..4f514bdfb1bd 100644
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -90,7 +90,7 @@
*/
#define pstate_field(op1, op2) ((op1) << Op1_shift | (op2) << Op2_shift)
#define PSTATE_Imm_shift CRm_shift
-#define SET_PSTATE(x, r) __emit_inst(0xd500401f | PSTATE_ ## r | ((!!x) << PSTATE_Imm_shift))
+#define MSR_PSTATE_ENCODE(x, r) __emit_inst(0xd500401f | PSTATE_ ## r | ((!!x) << PSTATE_Imm_shift))
#define PSTATE_PAN pstate_field(0, 4)
#define PSTATE_UAO pstate_field(0, 3)
@@ -99,18 +99,18 @@
#define PSTATE_TCO pstate_field(3, 4)
#define PSTATE_ALLINT pstate_field(1, 0)
-#define SET_PSTATE_PAN(x) SET_PSTATE((x), PAN)
-#define SET_PSTATE_UAO(x) SET_PSTATE((x), UAO)
-#define SET_PSTATE_SSBS(x) SET_PSTATE((x), SSBS)
-#define SET_PSTATE_DIT(x) SET_PSTATE((x), DIT)
-#define SET_PSTATE_TCO(x) SET_PSTATE((x), TCO)
-#define SET_PSTATE_ALLINT(x) SET_PSTATE((x), ALLINT)
-
-#define set_pstate_pan(x) asm volatile(SET_PSTATE_PAN(x))
-#define set_pstate_uao(x) asm volatile(SET_PSTATE_UAO(x))
-#define set_pstate_ssbs(x) asm volatile(SET_PSTATE_SSBS(x))
-#define set_pstate_dit(x) asm volatile(SET_PSTATE_DIT(x))
-#define set_pstate_allint(x) asm volatile(SET_PSTATE_ALLINT(x))
+#define MSR_PSTATE_PAN(x) MSR_PSTATE_ENCODE((x), PAN)
+#define MSR_PSTATE_UAO(x) MSR_PSTATE_ENCODE((x), UAO)
+#define MSR_PSTATE_SSBS(x) MSR_PSTATE_ENCODE((x), SSBS)
+#define MSR_PSTATE_DIT(x) MSR_PSTATE_ENCODE((x), DIT)
+#define MSR_PSTATE_TCO(x) MSR_PSTATE_ENCODE((x), TCO)
+#define MSR_PSTATE_ALLINT(x) MSR_PSTATE_ENCODE((x), ALLINT)
+
+#define msr_pstate_pan(x) asm volatile(MSR_PSTATE_PAN(x))
+#define msr_pstate_uao(x) asm volatile(MSR_PSTATE_UAO(x))
+#define msr_pstate_ssbs(x) asm volatile(MSR_PSTATE_SSBS(x))
+#define msr_pstate_dit(x) asm volatile(MSR_PSTATE_DIT(x))
+#define msr_pstate_allint(x) asm volatile(MSR_PSTATE_ALLINT(x))
---->8----
Thanks.
--
BR
Liao, Chang
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