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Message-ID: <20240604231335.7hveikgyu4tjtcwf@synopsys.com>
Date: Tue, 4 Jun 2024 23:13:38 +0000
From: Thinh Nguyen <Thinh.Nguyen@...opsys.com>
To: joswang <joswang1221@...il.com>
CC: Thinh Nguyen <Thinh.Nguyen@...opsys.com>,
        "robh@...nel.org" <robh@...nel.org>,
        "krzk+dt@...nel.org" <krzk+dt@...nel.org>,
        "conor+dt@...nel.org" <conor+dt@...nel.org>,
        "gregkh@...uxfoundation.org" <gregkh@...uxfoundation.org>,
        "linux-usb@...r.kernel.org" <linux-usb@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "balbi@...nel.org" <balbi@...nel.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        joswang <joswang@...ovo.com>
Subject: Re: [PATCH v2, 3/3] usb: dwc3: core: Workaround for CSR read timeout

On Tue, Jun 04, 2024, joswang wrote:
> On Tue, Jun 4, 2024 at 8:07 AM Thinh Nguyen <Thinh.Nguyen@...opsys.com> wrote:
> >
> > On Mon, Jun 03, 2024, joswang wrote:
> > > From: joswang <joswang@...ovo.com>
> > >
> > > DWC31 version 2.00a have an issue that would cause
> > > a CSR read timeout When CSR read coincides with RAM
> > > Clock Gating Entry.
> >
> > Do you have the STAR issue number?
> >
> Thanks for reviewing the code.
> The STAR number provided by Synopsys is 4846132.
> Please help review further.
> 

I'll get back on this. Please also provide the STAR for the other case.

Thanks,
Thinh

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