linux-kernel - Re: [PATCH 4/6] KVM: PPC: Book3S HV: Add one-reg interface for DEXCR register

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Date: Tue, 04 Jun 2024 15:43:06 +1000
From: "Nicholas Piggin" <npiggin@...il.com>
To: "Shivaprasad G Bhat" <sbhat@...ux.ibm.com>, <kvm@...r.kernel.org>,
 <linux-doc@...r.kernel.org>, <linuxppc-dev@...ts.ozlabs.org>
Cc: <pbonzini@...hat.com>, <naveen.n.rao@...ux.ibm.com>,
 <christophe.leroy@...roup.eu>, <corbet@....net>, <mpe@...erman.id.au>,
 <namhyung@...nel.org>, <pbonzini@...hat.com>, <jniethe5@...il.com>,
 <atrajeev@...ux.vnet.ibm.com>, <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 4/6] KVM: PPC: Book3S HV: Add one-reg interface for
 DEXCR register

On Mon Jun 3, 2024 at 9:14 PM AEST, Shivaprasad G Bhat wrote:
> The patch adds a one-reg register identifier which can be used to
> read and set the DEXCR for the guest during enter/exit with
> KVM_REG_PPC_DEXCR. The specific SPR KVM API documentation
> too updated.

I wonder if the uapi and documentation parts should go in their
own patch in a ppc kvm uapi topic branch? Otherwise looks okay.

Reviewed-by: Nicholas Piggin <npiggin@...il.com>

>
> Signed-off-by: Shivaprasad G Bhat <sbhat@...ux.ibm.com>
> ---
>  Documentation/virt/kvm/api.rst            |    1 +
>  arch/powerpc/include/uapi/asm/kvm.h       |    1 +
>  arch/powerpc/kvm/book3s_hv.c              |    6 ++++++
>  tools/arch/powerpc/include/uapi/asm/kvm.h |    1 +
>  4 files changed, 9 insertions(+)
>
> diff --git a/Documentation/virt/kvm/api.rst b/Documentation/virt/kvm/api.rst
> index a71d91978d9e..81077c654281 100644
> --- a/Documentation/virt/kvm/api.rst
> +++ b/Documentation/virt/kvm/api.rst
> @@ -2441,6 +2441,7 @@ registers, find a list below:
>    PPC     KVM_REG_PPC_PTCR                64
>    PPC     KVM_REG_PPC_DAWR1               64
>    PPC     KVM_REG_PPC_DAWRX1              64
> +  PPC     KVM_REG_PPC_DEXCR               64
>    PPC     KVM_REG_PPC_TM_GPR0             64
>    ...
>    PPC     KVM_REG_PPC_TM_GPR31            64
> diff --git a/arch/powerpc/include/uapi/asm/kvm.h b/arch/powerpc/include/uapi/asm/kvm.h
> index 1691297a766a..fcb947f65667 100644
> --- a/arch/powerpc/include/uapi/asm/kvm.h
> +++ b/arch/powerpc/include/uapi/asm/kvm.h
> @@ -645,6 +645,7 @@ struct kvm_ppc_cpu_char {
>  #define KVM_REG_PPC_SIER3	(KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xc3)
>  #define KVM_REG_PPC_DAWR1	(KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xc4)
>  #define KVM_REG_PPC_DAWRX1	(KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xc5)
> +#define KVM_REG_PPC_DEXCR	(KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xc6)
>  
>  /* Transactional Memory checkpointed state:
>   * This is all GPRs, all VSX regs and a subset of SPRs
> diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c
> index b576781d58d5..1294c6839d37 100644
> --- a/arch/powerpc/kvm/book3s_hv.c
> +++ b/arch/powerpc/kvm/book3s_hv.c
> @@ -2349,6 +2349,9 @@ static int kvmppc_get_one_reg_hv(struct kvm_vcpu *vcpu, u64 id,
>  	case KVM_REG_PPC_DAWRX1:
>  		*val = get_reg_val(id, kvmppc_get_dawrx1_hv(vcpu));
>  		break;
> +	case KVM_REG_PPC_DEXCR:
> +		*val = get_reg_val(id, kvmppc_get_dexcr_hv(vcpu));
> +		break;
>  	case KVM_REG_PPC_CIABR:
>  		*val = get_reg_val(id, kvmppc_get_ciabr_hv(vcpu));
>  		break;
> @@ -2592,6 +2595,9 @@ static int kvmppc_set_one_reg_hv(struct kvm_vcpu *vcpu, u64 id,
>  	case KVM_REG_PPC_DAWRX1:
>  		kvmppc_set_dawrx1_hv(vcpu, set_reg_val(id, *val) & ~DAWRX_HYP);
>  		break;
> +	case KVM_REG_PPC_DEXCR:
> +		kvmppc_set_dexcr_hv(vcpu, set_reg_val(id, *val));
> +		break;
>  	case KVM_REG_PPC_CIABR:
>  		kvmppc_set_ciabr_hv(vcpu, set_reg_val(id, *val));
>  		/* Don't allow setting breakpoints in hypervisor code */
> diff --git a/tools/arch/powerpc/include/uapi/asm/kvm.h b/tools/arch/powerpc/include/uapi/asm/kvm.h
> index 1691297a766a..fcb947f65667 100644
> --- a/tools/arch/powerpc/include/uapi/asm/kvm.h
> +++ b/tools/arch/powerpc/include/uapi/asm/kvm.h
> @@ -645,6 +645,7 @@ struct kvm_ppc_cpu_char {
>  #define KVM_REG_PPC_SIER3	(KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xc3)
>  #define KVM_REG_PPC_DAWR1	(KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xc4)
>  #define KVM_REG_PPC_DAWRX1	(KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xc5)
> +#define KVM_REG_PPC_DEXCR	(KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xc6)
>  
>  /* Transactional Memory checkpointed state:
>   * This is all GPRs, all VSX regs and a subset of SPRs