linux-kernel - [PATCH v2 0/3] Add the core reset for UARTs of StarFive JH7110

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Message-ID: <20240604084729.57239-1-hal.feng@starfivetech.com>
Date: Tue,  4 Jun 2024 16:47:26 +0800
From: Hal Feng <hal.feng@...rfivetech.com>
To: Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
	Jiri Slaby <jirislaby@...nel.org>,
	Ilpo Järvinen <ilpo.jarvinen@...ux.intel.com>,
	Philipp Zabel <p.zabel@...gutronix.de>,
	Conor Dooley <conor+dt@...nel.org>,
	Palmer Dabbelt <palmer@...belt.com>,
	Paul Walmsley <paul.walmsley@...ive.com>,
	Albert Ou <aou@...s.berkeley.edu>
Cc: Emil Renner Berthing <emil.renner.berthing@...onical.com>,
	Hal Feng <hal.feng@...rfivetech.com>,
	devicetree@...r.kernel.org,
	linux-serial@...r.kernel.org,
	linux-riscv@...ts.infradead.org,
	linux-kernel@...r.kernel.org
Subject: [PATCH v2 0/3] Add the core reset for UARTs of StarFive JH7110

The UART of StarFive JH7110 needs two reset signals (apb, core) to
initialize. This patch series adds the missing core reset.

Changes since v1:
- Set maxItems to 1 for resets from other platforms.

History:
v1: https://lore.kernel.org/all/20240517061713.95803-1-hal.feng@starfivetech.com/

Hal Feng (3):
  dt-bindings: serial: snps-dw-apb-uart: Add one more reset signal for
    StarFive JH7110 SoC
  serial: 8250_dw: Use reset array API to get resets
  riscv: dts: starfive: jh7110: Add the core reset and jh7110 compatible
    for uarts

 .../bindings/serial/snps-dw-apb-uart.yaml     | 18 ++++++++++-
 arch/riscv/boot/dts/starfive/jh7110.dtsi      | 30 +++++++++++--------
 drivers/tty/serial/8250/8250_dw.c             |  2 +-
 3 files changed, 36 insertions(+), 14 deletions(-)


base-commit: c3f38fa61af77b49866b006939479069cd451173
-- 
2.43.2