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Date: Wed, 5 Jun 2024 14:40:28 +0200
From: Geert Uytterhoeven <geert@...ux-m68k.org>
To: "Lad, Prabhakar" <prabhakar.csengg@...il.com>
Cc: Michael Turquette <mturquette@...libre.com>, Stephen Boyd <sboyd@...nel.org>, 
	Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, 
	Philipp Zabel <p.zabel@...gutronix.de>, Magnus Damm <magnus.damm@...il.com>, 
	linux-renesas-soc@...r.kernel.org, linux-clk@...r.kernel.org, 
	devicetree@...r.kernel.org, linux-kernel@...r.kernel.org, 
	Fabrizio Castro <fabrizio.castro.jz@...esas.com>, 
	Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
Subject: Re: [PATCH 2/4] dt-bindings: clock: Add R9A09G057 CPG Clock and Reset Definitions

Hi Prabhakar,

On Thu, May 30, 2024 at 12:00 PM Lad, Prabhakar
<prabhakar.csengg@...il.com> wrote:
> On Thu, May 30, 2024 at 8:12 AM Geert Uytterhoeven <geert@...ux-m68k.org> wrote:
> > On Wed, May 29, 2024 at 11:10 PM Lad, Prabhakar
> > <prabhakar.csengg@...il.com> wrote:
> > > On Mon, May 27, 2024 at 10:18 AM Geert Uytterhoeven
> > > <geert@...ux-m68k.org> wrote:
> > > > On Fri, May 24, 2024 at 10:29 AM Prabhakar <prabhakar.csengg@...il.com> wrote:
> > > > > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
> > > > >
> > > > > Define RZ/V2H(P) (R9A09G057) Clock Pulse Generator module clock outputs
> > > > > (CPG_CLK_ON* registers), and reset definitions (CPG_RST_* registers)
> > > > > in Section 4.4.2 and 4.4.3 ("List of Clock/Reset Signals") of the RZ/V2H(P)
> > > > > Hardware User's Manual (Rev.1.01, Feb. 2024).
> > > > >
> > > > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
> > > >
> > > > > --- /dev/null
> > > > > +++ b/include/dt-bindings/clock/r9a09g057-cpg.h
> > > > > @@ -0,0 +1,644 @@
> > > > > +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > > > > + *
> > > > > + * Copyright (C) 2024 Renesas Electronics Corp.
> > > > > + */
> > > > > +#ifndef __DT_BINDINGS_CLOCK_R9A09G057_CPG_H__
> > > > > +#define __DT_BINDINGS_CLOCK_R9A09G057_CPG_H__
> > > > > +
> > > > > +#include <dt-bindings/clock/renesas-cpg-mssr.h>
> > > > > +
> > > > > +/* Clock list */
> > > >
> > > > No distinction between Core and Module clocks?
> > > >
> > > I was in two minds here. Would you prefer clocks with no CGC support
> > > to be listed as core clocks?
> >
> > What's CGC support? (Obviously I need some more reading before
> > I can tackle the rest of this series :-)
> >
> I meant the clocks which cannot be controlled by the CPG_CLKON_m
> register. Shall I add them as CORE clocks?

If you don't need to refer to these clocks from DT, there is no need to add
them to the bindings header file.

> > My comments are due to the bindings saying:
> >
> >   '#clock-cells':
> >     description: |
> >       - For CPG core clocks, the two clock specifier cells must be "CPG_CORE"
> >         and a core clock reference, as defined in
> >         <dt-bindings/clock/r9a09g057-cpg.h>,
> >       - For module clocks, the two clock specifier cells must be "CPG_MOD" and
> >         a module number, as defined in <dt-bindings/clock/r9a09g057-cpg.h>.
> >     const: 2
> >
> > while the header file does not make it obvious whether a clock needs
> > CPG_CORE or CPG_MOD.
> >
> I was intending to drop the CPG_CORE description in the next version.

OK.

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

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