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Message-ID: <20240605-manila-exploit-d7191ec7a4bc@spud>
Date: Wed, 5 Jun 2024 19:03:16 +0100
From: Conor Dooley <conor@...nel.org>
To: Rajnesh Kanwal <rkanwal@...osinc.com>
Cc: linux-kernel@...r.kernel.org, linux-perf-users@...r.kernel.org,
linux-riscv@...ts.infradead.org, adrian.hunter@...el.com,
alexander.shishkin@...ux.intel.com, ajones@...tanamicro.com,
anup@...infault.org, acme@...nel.org, atishp@...osinc.com,
beeman@...osinc.com, brauner@...nel.org, heiko@...ech.de,
irogers@...gle.com, mingo@...hat.com, james.clark@....com,
renyu.zj@...ux.alibaba.com, jolsa@...nel.org,
jisheng.teoh@...rfivetech.com, palmer@...belt.com,
tech-control-transfer-records@...ts.riscv.org, will@...nel.org,
kaiwenxue1@...il.com
Subject: Re: [PATCH RFC 2/6] riscv: perf: Add Control transfer records CSR
definations.
On Wed, May 29, 2024 at 07:53:33PM +0100, Rajnesh Kanwal wrote:
> Adding CSR defines for RISCV Control Transfer Records extension [0]
> along with bit-field macros for each CSR.
>
> [0]: https://github.com/riscv/riscv-control-transfer-records
>
> Signed-off-by: Rajnesh Kanwal <rkanwal@...osinc.com>
> ---
> arch/riscv/include/asm/csr.h | 83 ++++++++++++++++++++++++++++++++++++
This patch isn't for perf, so $subject is a bit misleading.
Thanks,
Conor.
> 1 file changed, 83 insertions(+)
>
> diff --git a/arch/riscv/include/asm/csr.h b/arch/riscv/include/asm/csr.h
> index 701963b64fc4..a80a2ee9d44e 100644
> --- a/arch/riscv/include/asm/csr.h
> +++ b/arch/riscv/include/asm/csr.h
> @@ -309,6 +309,85 @@
>
> #define CSR_SSCOUNTOVF 0xda0
>
> +/* M-mode Control Transfer Records CSRs */
> +#define CSR_MCTRCTL 0x34e
> +
> +/* S-mode Control Transfer Records CSRs */
> +#define CSR_SCTRCTL 0x14e
> +#define CSR_SCTRSTATUS 0x14f
> +#define CSR_SCTRDEPTH 0x15f
> +
> +/* VS-mode Control Transfer Records CSRs */
> +#define CSR_VSCTRCTL 0x24e
> +
> +/* xctrtl CSR bits. */
> +#define CTRCTL_U_ENABLE _AC(0x1, UL)
> +#define CTRCTL_S_ENABLE _AC(0x2, UL)
> +#define CTRCTL_M_ENABLE _AC(0x4, UL)
> +#define CTRCTL_RASEMU _AC(0x80, UL)
> +#define CTRCTL_STE _AC(0x100, UL)
> +#define CTRCTL_MTE _AC(0x200, UL)
> +#define CTRCTL_BPFRZ _AC(0x800, UL)
> +#define CTRCTL_LCOFIFRZ _AC(0x1000, UL)
> +#define CTRCTL_EXCINH _AC(0x200000000, UL)
> +#define CTRCTL_INTRINH _AC(0x400000000, UL)
> +#define CTRCTL_TRETINH _AC(0x800000000, UL)
> +#define CTRCTL_NTBREN _AC(0x1000000000, UL)
> +#define CTRCTL_TKBRINH _AC(0x2000000000, UL)
> +#define CTRCTL_INDCALL_INH _AC(0x10000000000, UL)
> +#define CTRCTL_DIRCALL_INH _AC(0x20000000000, UL)
> +#define CTRCTL_INDJUMP_INH _AC(0x40000000000, UL)
> +#define CTRCTL_DIRJUMP_INH _AC(0x80000000000, UL)
> +#define CTRCTL_CORSWAP_INH _AC(0x100000000000, UL)
> +#define CTRCTL_RET_INH _AC(0x200000000000, UL)
> +#define CTRCTL_INDOJUMP_INH _AC(0x400000000000, UL)
> +#define CTRCTL_DIROJUMP_INH _AC(0x800000000000, UL)
> +
> +/* sctrstatus CSR bits. */
> +#define SCTRSTATUS_WRPTR_MASK 0xFF
> +#define SCTRSTATUS_FROZEN _AC(0x80000000, UL)
> +
> +#ifdef CONFIG_RISCV_M_MODE
> +#define CTRCTL_KERNEL_ENABLE CTRCTL_M_ENABLE
> +#else
> +#define CTRCTL_KERNEL_ENABLE CTRCTL_S_ENABLE
> +#endif
> +
> +/* sctrdepth CSR bits. */
> +#define SCTRDEPTH_MASK 0x7
> +
> +#define SCTRDEPTH_MIN 0x0 /* 16 Entries. */
> +#define SCTRDEPTH_MAX 0x4 /* 256 Entries. */
> +
> +/* ctrsource, ctrtarget and ctrdata CSR bits. */
> +#define CTRSOURCE_VALID 0x1ULL
> +#define CTRTARGET_MISP 0x1ULL
> +
> +#define CTRDATA_TYPE_MASK 0xF
> +#define CTRDATA_CCV 0x8000
> +#define CTRDATA_CCM_MASK 0xFFF0000
> +#define CTRDATA_CCE_MASK 0xF0000000
> +
> +#define CTRDATA_TYPE_NONE 0
> +#define CTRDATA_TYPE_EXCEPTION 1
> +#define CTRDATA_TYPE_INTERRUPT 2
> +#define CTRDATA_TYPE_TRAP_RET 3
> +#define CTRDATA_TYPE_NONTAKEN_BRANCH 4
> +#define CTRDATA_TYPE_TAKEN_BRANCH 5
> +#define CTRDATA_TYPE_RESERVED_6 6
> +#define CTRDATA_TYPE_RESERVED_7 7
> +#define CTRDATA_TYPE_INDIRECT_CALL 8
> +#define CTRDATA_TYPE_DIRECT_CALL 9
> +#define CTRDATA_TYPE_INDIRECT_JUMP 10
> +#define CTRDATA_TYPE_DIRECT_JUMP 11
> +#define CTRDATA_TYPE_CO_ROUTINE_SWAP 12
> +#define CTRDATA_TYPE_RETURN 13
> +#define CTRDATA_TYPE_OTHER_INDIRECT_JUMP 14
> +#define CTRDATA_TYPE_OTHER_DIRECT_JUMP 15
> +
> +#define CTR_ENTRIES_FIRST 0x200
> +#define CTR_ENTRIES_LAST 0x2ff
> +
> #define CSR_SSTATUS 0x100
> #define CSR_SIE 0x104
> #define CSR_STVEC 0x105
> @@ -490,6 +569,8 @@
> # define CSR_TOPEI CSR_MTOPEI
> # define CSR_TOPI CSR_MTOPI
>
> +# define CSR_CTRCTL CSR_MCTRCTL
> +
> # define SR_IE SR_MIE
> # define SR_PIE SR_MPIE
> # define SR_PP SR_MPP
> @@ -520,6 +601,8 @@
> # define CSR_TOPEI CSR_STOPEI
> # define CSR_TOPI CSR_STOPI
>
> +# define CSR_CTRCTL CSR_SCTRCTL
> +
> # define SR_IE SR_SIE
> # define SR_PIE SR_SPIE
> # define SR_PP SR_SPP
> --
> 2.34.1
>
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