linux-kernel - [PATCH v8 23/23] arch: arm64: dts: meson: axg: add crypto node

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <20240607141242.2616580-24-avromanov@salutedevices.com>
Date: Fri, 7 Jun 2024 17:12:42 +0300
From: Alexey Romanov <avromanov@...utedevices.com>
To: <neil.armstrong@...aro.org>, <clabbe@...libre.com>,
	<herbert@...dor.apana.org.au>, <davem@...emloft.net>, <robh+dt@...nel.org>,
	<krzysztof.kozlowski+dt@...aro.org>, <conor+dt@...nel.org>,
	<khilman@...libre.com>, <jbrunet@...libre.com>,
	<martin.blumenstingl@...glemail.com>, <vadim.fedorenko@...ux.dev>
CC: <linux-crypto@...r.kernel.org>, <linux-amlogic@...ts.infradead.org>,
	<linux-kernel@...r.kernel.org>, <devicetree@...r.kernel.org>,
	<linux-arm-kernel@...ts.infradead.org>, <kernel@...utedevices.com>, Alexey
 Romanov <avromanov@...utedevices.com>
Subject: [PATCH v8 23/23] arch: arm64: dts: meson: axg: add crypto node

This patch adds a crypto node declaration. With the
Amlogic crypto driver we can use HW implementation
of SHA1/224/256 and AES algo.

Signed-off-by: Alexey Romanov <avromanov@...utedevices.com>
---
 arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
index 6d12b760b90f..4a3d5c2f823d 100644
--- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
@@ -294,6 +294,14 @@ ethmac: ethernet@...f0000 {
 			status = "disabled";
 		};
 
+		crypto: crypto@...3e000 {
+			compatible = "amlogic,axg-crypto";
+			reg = <0x0 0xff63e000 0x0 0x48>;
+			interrupts = <GIC_SPI 180 IRQ_TYPE_EDGE_RISING>;
+			clocks = <&clkc CLKID_CLK81>;
+			clock-names = "clk81";
+		};
+
 		pcie_phy: phy@...44000 {
 			compatible = "amlogic,axg-pcie-phy";
 			reg = <0x0 0xff644000 0x0 0x1c>;
-- 
2.34.1