linux-kernel - Re: [PATCH 5/7] arm64: dts: imx8qm-mek: add i2c in mipi[0,1] subsystem

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Date: Fri, 07 Jun 2024 08:17:39 +0200
From: Alexander Stein <alexander.stein@...tq-group.com>
To: Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, Shawn Guo <shawnguo@...nel.org>, Sascha Hauer <s.hauer@...gutronix.de>, Pengutronix Kernel Team <kernel@...gutronix.de>, Fabio Estevam <festevam@...il.com>, Dong Aisheng <aisheng.dong@....com>, linux-arm-kernel@...ts.infradead.org
Cc: devicetree@...r.kernel.org, imx@...ts.linux.dev, linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org, Frank Li <Frank.Li@....com>, Frank Li <Frank.Li@....com>
Subject: Re: [PATCH 5/7] arm64: dts: imx8qm-mek: add i2c in mipi[0,1] subsystem

Hi,

Am Donnerstag, 6. Juni 2024, 20:46:59 CEST schrieb Frank Li:
> Add i2c node in mipi[0,1] subystem for imx8qm-mek.
> 
> Signed-off-by: Frank Li <Frank.Li@....com>
> ---
>  arch/arm64/boot/dts/freescale/imx8qm-mek.dts | 34 ++++++++++++++++++++++++++++
>  1 file changed, 34 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8qm-mek.dts b/arch/arm64/boot/dts/freescale/imx8qm-mek.dts
> index 80cb834d56bc2..cdcd5993cc69f 100644
> --- a/arch/arm64/boot/dts/freescale/imx8qm-mek.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8qm-mek.dts
> @@ -388,6 +388,24 @@ &i2c1_lvds1 {
>  	status = "okay";
>  };
>  
> +&i2c0_mipi0 {
> +	#address-cells = <1>;
> +	#size-cells = <0>;

These two properties should be part of the .dtsi.

> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_mipi0_lpi2c0>;
> +	clock-frequency = <100000>;
> +	status = "okay";
> +};
> +
> +&i2c0_mipi1 {
> +	#address-cells = <1>;
> +	#size-cells = <0>;

These two properties should be part of the .dtsi.

Best regards,
Alexander

> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_mipi1_lpi2c0>;
> +	clock-frequency = <100000>;
> +	status = "okay";
> +};
> +
>  &flexcan1 {
>  	pinctrl-names = "default";
>  	pinctrl-0 = <&pinctrl_flexcan1>;
> @@ -660,6 +678,22 @@ IMX8QM_SPI2_CS0_LSIO_GPIO3_IO10		0x21
>  		>;
>  	};
>  
> +	pinctrl_mipi0_lpi2c0: mipi0_lpi2c0grp {
> +		fsl,pins = <
> +			IMX8QM_MIPI_DSI0_I2C0_SCL_MIPI_DSI0_I2C0_SCL      0xc6000020
> +			IMX8QM_MIPI_DSI0_I2C0_SDA_MIPI_DSI0_I2C0_SDA      0xc6000020
> +			IMX8QM_MIPI_DSI0_GPIO0_01_LSIO_GPIO1_IO19         0x00000020
> +		>;
> +	};
> +
> +	pinctrl_mipi1_lpi2c0: mipi1_lpi2c0grp {
> +		fsl,pins = <
> +			IMX8QM_MIPI_DSI1_I2C0_SCL_MIPI_DSI1_I2C0_SCL      0xc6000020
> +			IMX8QM_MIPI_DSI1_I2C0_SDA_MIPI_DSI1_I2C0_SDA      0xc6000020
> +			IMX8QM_MIPI_DSI1_GPIO0_01_LSIO_GPIO1_IO23         0x00000020
> +		>;
> +	};
> +
>  	pinctrl_flexspi0: flexspi0grp {
>  		fsl,pins = <
>  			IMX8QM_QSPI0A_DATA0_LSIO_QSPI0A_DATA0     0x06000021
> 
> 


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