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Message-Id: <1718019553-111939-1-git-send-email-dh10.jung@samsung.com>
Date: Mon, 10 Jun 2024 20:39:10 +0900
From: Daehwan Jung <dh10.jung@...sung.com>
To: Greg Kroah-Hartman <gregkh@...uxfoundation.org>, Thinh Nguyen
<Thinh.Nguyen@...opsys.com>, Mathias Nyman <mathias.nyman@...el.com>
Cc: linux-usb@...r.kernel.org (open list:USB SUBSYSTEM),
linux-kernel@...r.kernel.org (open list), h10.kim@...sung.com, Daehwan Jung
<dh10.jung@...sung.com>
Subject: [PATCH v3 0/3] usb: Add quirk for writing high-low order
There's the limitation of Synopsys dwc3 controller with ERST programming in
supporting separate ERSTBA_HI and ERSTBA_LO programming. It's supported when
the ERSTBA is programmed ERSTBA_HI before ERSTBA_LO. But, writing operations
in xHCI is done low-high order following xHCI spec. xHCI specification 5.1
"Register Conventions" states that 64 bit registers should be written in
low-high order. Synopsys dwc3 needs workaround for high-low order. That's why
I add new quirk to support this.
---
Changes in v3:
- remove dt-bindings of dwc3/xhci
- pass quirk property unconditionally from dwc3 to xhci platform
- add description and change note in each patch
Link to v2: https://lore.kernel.org/r/1717135657-120818-1-git-send-email-dh10.jung@samsung.com/
Changes in v2:
- add a quirk in dwc3
- add dt-bindings of dwc3/xhci
- set the quirk in xhci-plat from dwc3
Link to v1: https://lore.kernel.org/r/1716875836-186791-1-git-send-email-dh10.jung@samsung.com/
Changes in v1:
- add a quirk in xhci
- use the quirk for programming ERST high-low order
Link to RFC: https://lore.kernel.org/r/1716339839-44022-1-git-send-email-dh10.jung@samsung.com/
---
Daehwan Jung (3):
usb: dwc3: Support quirk for writing high-low order
xhci: Add a quirk for writing ERST in high-low order
usb: host: xhci-plat: Add support for XHCI_WRITE_64_HI_LO
drivers/usb/dwc3/host.c | 4 +++-
drivers/usb/host/xhci-mem.c | 5 ++++-
drivers/usb/host/xhci-plat.c | 3 +++
drivers/usb/host/xhci.h | 2 ++
4 files changed, 12 insertions(+), 2 deletions(-)
--
2.7.4
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