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Message-ID: <bdea4e6c-eee5-4f4a-85b9-738d61b19800@kernel.org>
Date: Mon, 10 Jun 2024 15:25:08 +0200
From: Krzysztof Kozlowski <krzk@...nel.org>
To: daire.mcnamara@...rochip.com, linux-pci@...r.kernel.org
Cc: conor.dooley@...rochip.com, lpieralisi@...nel.org, kw@...ux.com,
robh@...nel.org, bhelgaas@...gle.com, linux-kernel@...r.kernel.org,
linux-riscv@...ts.infradead.org
Subject: Re: [PATCH v2 3/3] dt-bindings: PCI: microchip,pcie-host: allow
dma-noncoherent
On 10/06/2024 14:18, daire.mcnamara@...rochip.com wrote:
> From: Conor Dooley <conor.dooley@...rochip.com>
>
> PolarFire SoC may be configured in a way that requires non-coherent DMA
> handling. On RISC-V, buses are coherent by default & the dma-noncoherent
> property is required to denote buses or devices that are non-coherent.
>
> Signed-off-by: Conor Dooley <conor.dooley@...rochip.com>
Missing SoB
Please use scripts/get_maintainers.pl to get a list of necessary people
and lists to CC. It might happen, that command when run on an older
kernel, gives you outdated entries. Therefore please be sure you base
your patches on recent Linux kernel.
Tools like b4 or scripts/get_maintainer.pl provide you proper list of
people, so fix your workflow. Tools might also fail if you work on some
ancient tree (don't, instead use mainline), work on fork of kernel
(don't, instead use mainline) or you ignore some maintainers (really
don't). Just use b4 and everything should be fine, although remember
about `b4 prep --auto-to-cc` if you added new patches to the patchset.
You missed at least devicetree list (maybe more), so this won't be
tested by automated tooling. Performing review on untested code might be
a waste of time.
Please kindly resend and include all necessary To/Cc entries.
Best regards,
Krzysztof
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