lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <23ee1734-7e65-4f11-aede-fea44ada3cc4@arm.com>
Date: Mon, 10 Jun 2024 14:29:55 +0100
From: Leo Yan <leo.yan@....com>
To: Ian Rogers <irogers@...gle.com>, Suzuki K Poulose
 <suzuki.poulose@....com>, Mike Leach <mike.leach@...aro.org>,
 James Clark <james.clark@....com>, John Garry <john.g.garry@...cle.com>,
 Will Deacon <will@...nel.org>, Leo Yan <leo.yan@...ux.dev>,
 Peter Zijlstra <peterz@...radead.org>, Ingo Molnar <mingo@...hat.com>,
 Arnaldo Carvalho de Melo <acme@...nel.org>,
 Namhyung Kim <namhyung@...nel.org>, Mark Rutland <mark.rutland@....com>,
 Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
 Jiri Olsa <jolsa@...nel.org>, Adrian Hunter <adrian.hunter@...el.com>,
 Kan Liang <kan.liang@...ux.intel.com>, coresight@...ts.linaro.org,
 linux-arm-kernel@...ts.infradead.org, linux-perf-users@...r.kernel.org,
 linux-kernel@...r.kernel.org, Yicong Yang <yangyicong@...wei.com>
Subject: Re: [PATCH v1] perf arm: Workaround ARM PMUs cpu maps having offline
 cpus


Hi Ian,

On 6/7/24 07:53, Ian Rogers wrote:

[...]

> diff --git a/tools/perf/arch/arm/util/pmu.c b/tools/perf/arch/arm/util/pmu.c
> index 8b7cb68ba1a8..6b544edbd3f6 100644
> --- a/tools/perf/arch/arm/util/pmu.c
> +++ b/tools/perf/arch/arm/util/pmu.c
> @@ -11,12 +11,15 @@
> 
>   #include "arm-spe.h"
>   #include "hisi-ptt.h"
> +#include "../../../util/cpumap.h"
>   #include "../../../util/pmu.h"
>   #include "../../../util/cs-etm.h"
>   #include "../../arm64/util/mem-events.h"
> 
> -void perf_pmu__arch_init(struct perf_pmu *pmu __maybe_unused)
> +void perf_pmu__arch_init(struct perf_pmu *pmu)
>   {
> +       struct perf_cpu_map *intersect;
> +
>   #ifdef HAVE_AUXTRACE_SUPPORT
>          if (!strcmp(pmu->name, CORESIGHT_ETM_PMU_NAME)) {
>                  /* add ETM default config here */
> @@ -33,6 +36,9 @@ void perf_pmu__arch_init(struct perf_pmu *pmu __maybe_unused)
>                  pmu->selectable = true;
>   #endif
>          }
> -
>   #endif
> +       /* Workaround some ARM PMU's failing to correctly set CPU maps for online processors. */
> +       intersect = perf_cpu_map__intersect(cpu_map__online(), pmu->cpus);
> +       perf_cpu_map__put(pmu->cpus);
> +       pmu->cpus = intersect;

I did a test for this patch, it works well for me.

Tested-by: Leo Yan <leo.yan@....com>

Just a nitpick and I think it is not an issue caused by this patch.
After hotplug off one CPU and then if specify the CPU with option '-C',
the 'perf stat' command still continues to run. This is inconsistent
with the 'perf record' which exits with failures immediately.

Maybe consider to send an extra patch to address this issue?

The test steps are:

   # echo 0 > /sys/devices/system/cpu0/online
   # perf stat -C 0 -e armv9_cortex_a520/cycles/ -- sleep 1
     WARNING: A requested CPU in '0' is not supported by PMU 
'armv9_cortex_a520' (CPUs 5) for event 'armv9_cortex_a520/cycles/'

     Performance counter stats for 'CPU(s) 0':

       <not supported>      armv9_cortex_a520/cycles/

           1.001223060 seconds time elapsed

Thanks,
Leo

>   }
> --
> 2.45.2.505.gda0bf45e8d-goog
> 
> 

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ