linux-kernel - Re: [PATCH v2 5/6] perf/x86: Enable NMI source reporting for perfmon

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite for Android: free password hash cracker in your pocket

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <8afef909-974e-40fe-a39c-3c1e4e6d6938@zytor.com>
Date: Tue, 11 Jun 2024 12:10:52 -0700
From: "H. Peter Anvin" <hpa@...or.com>
To: Jacob Pan <jacob.jun.pan@...ux.intel.com>, X86 Kernel <x86@...nel.org>,
        LKML <linux-kernel@...r.kernel.org>,
        Thomas Gleixner <tglx@...utronix.de>,
        Dave Hansen <dave.hansen@...el.com>, Ingo Molnar <mingo@...hat.com>,
        Borislav Petkov <bp@...en8.de>, linux-perf-users@...r.kernel.org,
        Peter Zijlstra <peterz@...radead.org>
Cc: Andi Kleen <andi.kleen@...el.com>, Xin Li <xin3.li@...el.com>,
        Zeng Guang <guang.zeng@...el.com>
Subject: Re: [PATCH v2 5/6] perf/x86: Enable NMI source reporting for perfmon

On 6/11/24 09:54, Jacob Pan wrote:
> 
> diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c
> index 1ef2201e48ac..db8c30881f5c 100644
> --- a/arch/x86/events/core.c
> +++ b/arch/x86/events/core.c
> @@ -46,6 +46,7 @@
>   
>   struct x86_pmu x86_pmu __read_mostly;
>   static struct pmu pmu;
> +u32 apic_perfmon_ctr = APIC_DM_NMI;
>   
>   DEFINE_PER_CPU(struct cpu_hw_events, cpu_hw_events) = {
>   	.enabled = 1,
> @@ -1680,7 +1681,7 @@ int x86_pmu_handle_irq(struct pt_regs *regs)
>   	 * This generic handler doesn't seem to have any issues where the
>   	 * unmasking occurs so it was left at the top.
>   	 */
> -	apic_write(APIC_LVTPC, APIC_DM_NMI);
> +	apic_write(APIC_LVTPC, apic_perfmon_ctr);
>   
>   	for (idx = 0; idx < x86_pmu.num_counters; idx++) {
>   		if (!test_bit(idx, cpuc->active_mask))
> @@ -1723,7 +1724,10 @@ void perf_events_lapic_init(void)
>   	/*
>   	 * Always use NMI for PMU
>   	 */
> -	apic_write(APIC_LVTPC, APIC_DM_NMI);
> +	if (cpu_feature_enabled(X86_FEATURE_NMI_SOURCE))
> +		apic_perfmon_ctr |= NMI_SOURCE_VEC_PMI;
> +
> +	apic_write(APIC_LVTPC, apic_perfmon_ctr);
>   }
>
There really is no reason to not do this unconditinoally. If NMI source 
is not supported it is simply a noop.

	-hpa