linux-kernel - Re: [PATCH v5 1/4] mips: bmips: rework and cache CBR addr handling

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Date: Tue, 11 Jun 2024 10:45:37 +0200
From: Thomas Bogendoerfer <tsbogend@...ha.franken.de>
To: Christian Marangi <ansuelsmth@...il.com>
Cc: Hauke Mehrtens <hauke@...ke-m.de>,
	Rafał Miłecki <zajec5@...il.com>,
	Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
	Conor Dooley <conor+dt@...nel.org>,
	Florian Fainelli <florian.fainelli@...adcom.com>,
	Broadcom internal kernel review list <bcm-kernel-feedback-list@...adcom.com>,
	linux-mips@...r.kernel.org, devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH v5 1/4] mips: bmips: rework and cache CBR addr handling

On Sat, May 11, 2024 at 03:03:45PM +0200, Christian Marangi wrote:
> diff --git a/arch/mips/bcm47xx/prom.c b/arch/mips/bcm47xx/prom.c
> index 99a1ba5394e0..49fe4c535161 100644
> --- a/arch/mips/bcm47xx/prom.c
> +++ b/arch/mips/bcm47xx/prom.c
> @@ -109,6 +109,8 @@ static __init void prom_init_mem(void)
>  
>  void __init prom_init(void)
>  {
> +	/* Cache CBR addr before CPU/DMA setup */
> +	bmips_cbr_addr = BMIPS_GET_CBR();
>  	prom_init_mem();
>  	setup_8250_early_printk_port(CKSEG1ADDR(BCM47XX_SERIAL_ADDR), 0, 0);
>  }

doesn't compile for me, probably missing and #include

Thomas.

-- 
Crap can work. Given enough thrust pigs will fly, but it's not necessarily a
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