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Date: Wed, 12 Jun 2024 16:48:33 +0100
From: Conor Dooley <conor@...nel.org>
To: linux-mmc@...r.kernel.org
Cc: conor@...nel.org,
	Conor Dooley <conor.dooley@...rochip.com>,
	Ulf Hansson <ulf.hansson@...aro.org>,
	cyril.jean@...rochip.com,
	Mark Brown <broonie@...nel.org>,
	linux-kernel@...r.kernel.org,
	linux-riscv@...ts.infradead.org,
	linux-spi@...r.kernel.org
Subject: [RFC v1 3/3] spi: microchip-core-qspi: set min_speed_hz during probe

From: Conor Dooley <conor.dooley@...rochip.com>

The controller's minimum possible bus clock is 1/30 the rate of the
input clock. Naively set the minimum bus clock speed the controller
is capable of during probe, assuming that the rate will never reduce
further.

Signed-off-by: Conor Dooley <conor.dooley@...rochip.com>
---
 drivers/spi/spi-microchip-core-qspi.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/spi/spi-microchip-core-qspi.c b/drivers/spi/spi-microchip-core-qspi.c
index 1b23a38c155c..a549911b2f66 100644
--- a/drivers/spi/spi-microchip-core-qspi.c
+++ b/drivers/spi/spi-microchip-core-qspi.c
@@ -763,6 +763,7 @@ static int mchp_coreqspi_probe(struct platform_device *pdev)
 	ctlr->transfer_one_message = mchp_coreqspi_transfer_one_message;
 	ctlr->num_chipselect = 2;
 	ctlr->use_gpio_descriptors = true;
+	ctlr->min_speed_hz = clk_get_rate(qspi->clk) / 30;
 
 	ret = devm_spi_register_controller(&pdev->dev, ctlr);
 	if (ret)
-- 
2.43.0


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