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Message-ID: <ZmnGlpBR91TyI3Lt@google.com>
Date: Wed, 12 Jun 2024 09:02:30 -0700
From: Sean Christopherson <seanjc@...gle.com>
To: James Houghton <jthoughton@...gle.com>
Cc: Andrew Morton <akpm@...ux-foundation.org>, Paolo Bonzini <pbonzini@...hat.com>,
Ankit Agrawal <ankita@...dia.com>, Axel Rasmussen <axelrasmussen@...gle.com>,
Catalin Marinas <catalin.marinas@....com>, David Matlack <dmatlack@...gle.com>,
David Rientjes <rientjes@...gle.com>, James Morse <james.morse@....com>,
Jonathan Corbet <corbet@....net>, Marc Zyngier <maz@...nel.org>, Oliver Upton <oliver.upton@...ux.dev>,
Raghavendra Rao Ananta <rananta@...gle.com>, Ryan Roberts <ryan.roberts@....com>,
Shaoqin Huang <shahuang@...hat.com>, Suzuki K Poulose <suzuki.poulose@....com>,
Wei Xu <weixugc@...gle.com>, Will Deacon <will@...nel.org>, Yu Zhao <yuzhao@...gle.com>,
Zenghui Yu <yuzenghui@...wei.com>, kvmarm@...ts.linux.dev, kvm@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-doc@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-mm@...ck.org
Subject: Re: [PATCH v5 8/9] mm: multi-gen LRU: Have secondary MMUs participate
in aging
On Tue, Jun 11, 2024, James Houghton wrote:
> diff --git a/mm/rmap.c b/mm/rmap.c
> index e8fc5ecb59b2..24a3ff639919 100644
> --- a/mm/rmap.c
> +++ b/mm/rmap.c
> @@ -870,13 +870,10 @@ static bool folio_referenced_one(struct folio *folio,
> continue;
> }
>
> - if (pvmw.pte) {
> - if (lru_gen_enabled() &&
> - pte_young(ptep_get(pvmw.pte))) {
> - lru_gen_look_around(&pvmw);
> + if (lru_gen_enabled() && pvmw.pte) {
> + if (lru_gen_look_around(&pvmw))
> referenced++;
> - }
> -
> + } else if (pvmw.pte) {
> if (ptep_clear_flush_young_notify(vma, address,
> pvmw.pte))
> referenced++;
Random question not really related to KVM/secondary MMU participation. AFAICT,
the MGLRU approach doesn't flush TLBs after aging pages. How does MGLRU mitigate
false negatives on pxx_young() due to the CPU not setting Accessed bits because
of stale TLB entries?
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