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Message-ID: <qinrviffefuy77tmk5itgiyapgpnfpzupggb6bgvlxk6kybxjn@h4wmocovtdch>
Date: Wed, 12 Jun 2024 22:05:03 +0300
From: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
To: Danila Tikhonov <danila@...xyga.com>
Cc: robdclark@...il.com, quic_abhinavk@...cinc.com, sean@...rly.run,
marijn.suijten@...ainline.org, maarten.lankhorst@...ux.intel.com, mripard@...nel.org,
tzimmermann@...e.de, airlied@...il.com, daniel@...ll.ch, robh@...nel.org,
krzk+dt@...nel.org, conor+dt@...nel.org, quic_rmccann@...cinc.com,
konrad.dybcio@...aro.org, neil.armstrong@...aro.org, jonathan@...ek.ca,
swboyd@...omium.org, quic_khsieh@...cinc.com, quic_jesszhan@...cinc.com,
linux-arm-msm@...r.kernel.org, dri-devel@...ts.freedesktop.org, freedreno@...ts.freedesktop.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 4/4] drm/msm/dpu: Add SM7150 support
On Wed, Jun 12, 2024 at 09:43:36PM +0300, Danila Tikhonov wrote:
> Add definitions for the display hardware used on the Qualcomm SM7150
> platform.
>
> Signed-off-by: Danila Tikhonov <danila@...xyga.com>
> ---
> .../msm/disp/dpu1/catalog/dpu_5_2_sm7150.h | 349 ++++++++++++++++++
> .../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 1 +
> .../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 1 +
> drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 1 +
> 4 files changed, 352 insertions(+)
> create mode 100644 drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_2_sm7150.h
>
[...]
> +static const struct dpu_sspp_cfg sm7150_sspp[] = {
> + {
> + .name = "sspp_0", .id = SSPP_VIG0,
> + .base = 0x4000, .len = 0x1f0,
> + .features = VIG_SDM845_MASK,
> + .sblk = &dpu_vig_sblk_qseed3_1_4,
dpu_vig_sblk_qseed3_2_4 (and further on).
> + .xin_id = 0,
> + .type = SSPP_TYPE_VIG,
> + .clk_ctrl = DPU_CLK_CTRL_VIG0,
> + }, {
> + .name = "sspp_1", .id = SSPP_VIG1,
> + .base = 0x6000, .len = 0x1f0,
> + .features = VIG_SDM845_MASK,
> + .sblk = &dpu_vig_sblk_qseed3_1_4,
> + .xin_id = 4,
> + .type = SSPP_TYPE_VIG,
> + .clk_ctrl = DPU_CLK_CTRL_VIG1,
> + }, {
> + .name = "sspp_2", .id = SSPP_DMA0,
> + .base = 0x24000, .len = 0x1f0,
> + .features = DMA_SDM845_MASK,
> + .sblk = &dpu_dma_sblk,
> + .xin_id = 1,
> + .type = SSPP_TYPE_DMA,
> + .clk_ctrl = DPU_CLK_CTRL_DMA0,
> + }, {
> + .name = "sspp_9", .id = SSPP_DMA1,
> + .base = 0x26000, .len = 0x1f0,
> + .features = DMA_SDM845_MASK,
> + .sblk = &dpu_dma_sblk,
> + .xin_id = 5,
> + .type = SSPP_TYPE_DMA,
> + .clk_ctrl = DPU_CLK_CTRL_DMA1,
> + }, {
> + .name = "sspp_10", .id = SSPP_DMA2,
> + .base = 0x28000, .len = 0x1f0,
> + .features = DMA_CURSOR_SDM845_MASK,
> + .sblk = &dpu_dma_sblk,
> + .xin_id = 9,
> + .type = SSPP_TYPE_DMA,
> + .clk_ctrl = DPU_CLK_CTRL_DMA2,
> + },
> +};
> +
> +static const struct dpu_lm_cfg sm7150_lm[] = {
> + {
> + .name = "lm_0", .id = LM_0,
> + .base = 0x44000, .len = 0x320,
> + .features = MIXER_SDM845_MASK,
> + .sblk = &sdm845_lm_sblk,
> + .lm_pair = LM_1,
> + .pingpong = PINGPONG_0,
> + .dspp = DSPP_0,
> + }, {
> + .name = "lm_1", .id = LM_1,
> + .base = 0x45000, .len = 0x320,
> + .features = MIXER_SDM845_MASK,
> + .sblk = &sdm845_lm_sblk,
> + .lm_pair = LM_0,
> + .pingpong = PINGPONG_1,
> + .dspp = DSPP_1,
> + }, {
> + .name = "lm_2", .id = LM_2,
> + .base = 0x46000, .len = 0x320,
> + .features = MIXER_SDM845_MASK,
> + .sblk = &sdm845_lm_sblk,
> + .lm_pair = LM_3,
> + .pingpong = PINGPONG_2,
> + }, {
> + .name = "lm_3", .id = LM_3,
> + .base = 0x47000, .len = 0x320,
> + .features = MIXER_SDM845_MASK,
> + .sblk = &sdm845_lm_sblk,
> + .lm_pair = LM_2,
> + .pingpong = PINGPONG_3,
> + }, {
> + .name = "lm_4", .id = LM_4,
> + .base = 0x0, .len = 0x320,
> + .features = MIXER_SDM845_MASK,
> + .sblk = &sdm845_lm_sblk,
> + .lm_pair = 0,
> + .pingpong = PINGPONG_4,
> + }, {
> + .name = "lm_5", .id = LM_5,
> + .base = 0x0, .len = 0x320,
> + .features = MIXER_SDM845_MASK,
> + .sblk = &sdm845_lm_sblk,
> + .lm_pair = 0,
> + .pingpong = PINGPONG_5,
> + },
Please drop LM_4 and LM_5, I don't think they are really a part of the
hardware (especially with base = 0).
> +};
> +
--
With best wishes
Dmitry
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