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Message-ID: <20240612065634.26569-3-angelogioacchino.delregno@collabora.com>
Date: Wed, 12 Jun 2024 08:56:33 +0200
From: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
To: chunkuang.hu@...nel.org
Cc: robh@...nel.org,
krzysztof.kozlowski+dt@...aro.org,
conor+dt@...nel.org,
p.zabel@...gutronix.de,
airlied@...il.com,
daniel@...ll.ch,
maarten.lankhorst@...ux.intel.com,
mripard@...nel.org,
tzimmermann@...e.de,
matthias.bgg@...il.com,
angelogioacchino.delregno@...labora.com,
shawn.sung@...iatek.com,
yu-chang.lee@...iatek.com,
ck.hu@...iatek.com,
jitao.shi@...iatek.com,
devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
dri-devel@...ts.freedesktop.org,
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michael@...le.cc,
Alexandre Mergnat <amergnat@...libre.com>
Subject: [PATCH v7 2/3] dt-bindings: arm: mediatek: mmsys: Add OF graph support for board path
Document OF graph on MMSYS/VDOSYS: this supports up to three DDP paths
per HW instance (so potentially up to six displays for multi-vdo SoCs).
The MMSYS or VDOSYS is always the first component in the DDP pipeline,
so it only supports an output port with multiple endpoints - where each
endpoint defines the starting point for one of the (currently three)
possible hardware paths.
Reviewed-by: Rob Herring (Arm) <robh@...nel.org>
Reviewed-by: Alexandre Mergnat <amergnat@...libre.com>
Tested-by: Alexandre Mergnat <amergnat@...libre.com>
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
---
.../bindings/arm/mediatek/mediatek,mmsys.yaml | 28 +++++++++++++++++++
1 file changed, 28 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
index b3c6888c1457..3f4262e93c78 100644
--- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
+++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
@@ -93,6 +93,34 @@ properties:
'#reset-cells':
const: 1
+ port:
+ $ref: /schemas/graph.yaml#/properties/port
+ description:
+ Output port node. This port connects the MMSYS/VDOSYS output to
+ the first component of one display pipeline, for example one of
+ the available OVL or RDMA blocks.
+ Some MediaTek SoCs support multiple display outputs per MMSYS.
+ properties:
+ endpoint@0:
+ $ref: /schemas/graph.yaml#/properties/endpoint
+ description: Output to the primary display pipeline
+
+ endpoint@1:
+ $ref: /schemas/graph.yaml#/properties/endpoint
+ description: Output to the secondary display pipeline
+
+ endpoint@2:
+ $ref: /schemas/graph.yaml#/properties/endpoint
+ description: Output to the tertiary display pipeline
+
+ anyOf:
+ - required:
+ - endpoint@0
+ - required:
+ - endpoint@1
+ - required:
+ - endpoint@2
+
required:
- compatible
- reg
--
2.45.2
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