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Message-ID: <2024061247-geranium-unstaffed-ff09@gregkh>
Date: Wed, 12 Jun 2024 09:58:10 +0200
From: Greg KH <gregkh@...uxfoundation.org>
To: joswang <joswang1221@...il.com>
Cc: Thinh.Nguyen@...opsys.com, linux-usb@...r.kernel.org,
linux-kernel@...r.kernel.org, Jos Wang <joswang@...ovo.com>
Subject: Re: [PATCH v3, 3/3] usb: dwc3: core: Workaround for CSR read timeout
On Tue, Jun 11, 2024 at 10:29:53PM +0800, joswang wrote:
> From: Jos Wang <joswang@...ovo.com>
>
> This is a workaround for STAR 4846132, which only affects
> DWC_usb31 version2.00a operating in host mode.
>
> There is a problem in DWC_usb31 version 2.00a operating
> in host mode that would cause a CSR read timeout When CSR
> read coincides with RAM Clock Gating Entry. By disable
> Clock Gating, sacrificing power consumption for normal
> operation.
>
> Signed-off-by: Jos Wang <joswang@...ovo.com>
> ---
> v1 -> v2:
> - add "dt-bindings: usb: dwc3: Add snps,p2p3tranok quirk" patch
> v2 -> v3:
> - code refactor
> - modify comment, add STAR number, workaround applied in host mode
> - modify commit message, add STAR number, workaround applied in host mode
> - modify Author Jos Wang
> ---
> drivers/usb/dwc3/core.c | 20 +++++++++++++++++++-
> 1 file changed, 19 insertions(+), 1 deletion(-)
Should this have a cc: stable line?
thanks,
greg k-h
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