linux-kernel - [PATCH v2 0/6] Add board support for Sipeed LicheeRV Nano

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [thread-next>] [day] [month] [year] [list]

Message-Id: <20240612-sg2002-v2-0-19a585af6846@bootlin.com>
Date: Wed, 12 Jun 2024 10:02:30 +0200
From: Thomas Bonnefille <thomas.bonnefille@...tlin.com>
To: Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, 
 Conor Dooley <conor+dt@...nel.org>, 
 Paul Walmsley <paul.walmsley@...ive.com>, 
 Chen Wang <unicorn_wang@...look.com>, Inochi Amaoto <inochiama@...look.com>, 
 Chao Wei <chao.wei@...hgo.com>
Cc: Albert Ou <aou@...s.berkeley.edu>, Palmer Dabbelt <palmer@...belt.com>, 
 Samuel Holland <samuel.holland@...ive.com>, 
 Thomas Gleixner <tglx@...utronix.de>, 
 Daniel Lezcano <daniel.lezcano@...aro.org>, 
 Thomas Petazzoni <thomas.petazzoni@...tlin.com>, 
 Miquèl Raynal <miquel.raynal@...tlin.com>, 
 linux-kernel@...r.kernel.org, devicetree@...r.kernel.org, 
 linux-riscv@...ts.infradead.org, 
 Thomas Bonnefille <thomas.bonnefille@...tlin.com>
Subject: [PATCH v2 0/6] Add board support for Sipeed LicheeRV Nano

The LicheeRV Nano is a RISC-V SBC based on the Sophgo SG2002 chip. Adds
minimal device tree files for this board to make it boot to a basic
shell.

Signed-off-by: Thomas Bonnefille <thomas.bonnefille@...tlin.com>
---
Changes in v2:
- Add SDHCI support
- Change device tree name to match the Makefile
- Add oscillator frequency
- Add aliases to other UARTs
- Add aliases to GPIOs
- Move compatible for SDHCI from common DT to specific DT 
- Link to v1: https://lore.kernel.org/r/20240527-sg2002-v1-0-1b6cb38ce8f4@bootlin.com

---
Thomas Bonnefille (6):
      riscv: dts: sophgo: Put sdhci compatible in dt of specific SoC
      dt-bindings: interrupt-controller: Add SOPHGO SG2002 plic
      dt-bindings: timer: Add SOPHGO SG2002 clint
      dt-bindings: riscv: Add Sipeed LicheeRV Nano board compatibles
      riscv: dts: sophgo: Add initial SG2002 SoC device tree
      riscv: dts: sophgo: Add LicheeRV Nano board device tree

 .../interrupt-controller/sifive,plic-1.0.0.yaml    |  1 +
 .../devicetree/bindings/riscv/sophgo.yaml          |  5 ++
 .../devicetree/bindings/timer/sifive,clint.yaml    |  1 +
 arch/riscv/boot/dts/sophgo/Makefile                |  1 +
 arch/riscv/boot/dts/sophgo/cv1800b.dtsi            |  4 ++
 arch/riscv/boot/dts/sophgo/cv18xx.dtsi             |  1 -
 .../boot/dts/sophgo/sg2002-licheerv-nano-b.dts     | 53 ++++++++++++++++++++++
 arch/riscv/boot/dts/sophgo/sg2002.dtsi             | 34 ++++++++++++++
 8 files changed, 99 insertions(+), 1 deletion(-)
---
base-commit: 83a7eefedc9b56fe7bfeff13b6c7356688ffa670
change-id: 20240515-sg2002-93dce1d263be

Best regards,
-- 
Thomas Bonnefille <thomas.bonnefille@...tlin.com>