linux-kernel - Re: [PATCH v2 1/6] riscv: dts: sophgo: Put sdhci compatible in dt of specific SoC

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Message-ID:
 <IA1PR20MB49534C9E29E86B478205E4B3BBC02@IA1PR20MB4953.namprd20.prod.outlook.com>
Date: Wed, 12 Jun 2024 18:47:47 +0800
From: Inochi Amaoto <inochiama@...look.com>
To: Jisheng Zhang <jszhang@...nel.org>
Cc: Thomas Bonnefille <thomas.bonnefille@...tlin.com>, 
	Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, 
	Conor Dooley <conor+dt@...nel.org>, Paul Walmsley <paul.walmsley@...ive.com>, 
	Chen Wang <unicorn_wang@...look.com>, Inochi Amaoto <inochiama@...look.com>, 
	Chao Wei <chao.wei@...hgo.com>, Albert Ou <aou@...s.berkeley.edu>, 
	Palmer Dabbelt <palmer@...belt.com>, Samuel Holland <samuel.holland@...ive.com>, 
	Thomas Gleixner <tglx@...utronix.de>, Daniel Lezcano <daniel.lezcano@...aro.org>, 
	Thomas Petazzoni <thomas.petazzoni@...tlin.com>, Miquèl Raynal <miquel.raynal@...tlin.com>, 
	linux-kernel@...r.kernel.org, devicetree@...r.kernel.org, linux-riscv@...ts.infradead.org
Subject: Re: [PATCH v2 1/6] riscv: dts: sophgo: Put sdhci compatible in dt of
 specific SoC

On Wed, Jun 12, 2024 at 10:02:31AM GMT, Thomas Bonnefille wrote:
> Remove SDHCI compatible for CV1800b from common dtsi file to put it in
> the specific dtsi file of the CV1800b.
> This commits aims at following the same guidelines as in the other nodes
> of the CV18XX family.
> 
> Signed-off-by: Thomas Bonnefille <thomas.bonnefille@...tlin.com>
> ---
>  arch/riscv/boot/dts/sophgo/cv1800b.dtsi | 4 ++++
>  arch/riscv/boot/dts/sophgo/cv18xx.dtsi  | 1 -
>  2 files changed, 4 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
> index ec9530972ae2..b9cd51457b4c 100644
> --- a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
> +++ b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
> @@ -25,3 +25,7 @@ &clint {
>  &clk {
>  	compatible = "sophgo,cv1800-clk";
>  };
> +
> +&sdhci0 {
> +	compatible = "sophgo,cv1800b-dwcmshc";
> +};
> diff --git a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
> index 891932ae470f..7247c7c3013c 100644
> --- a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
> +++ b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
> @@ -288,7 +288,6 @@ uart4: serial@...0000 {
>  		};
>  
>  		sdhci0: mmc@...0000 {
> -			compatible = "sophgo,cv1800b-dwcmshc";
>  			reg = <0x4310000 0x1000>;
>  			interrupts = <36 IRQ_TYPE_LEVEL_HIGH>;
>  			clocks = <&clk CLK_AXI4_SD0>,
> 
> -- 
> 2.45.2
> 

Hi, Jisheng,

Is this change necessary? IIRC, the sdhci is the same across 
the whole series.

Regards,
Inochi