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Message-ID: <20240612-sa8775p-v2-gcc-gpucc-fixes-v2-0-adcc756a23df@quicinc.com>
Date: Wed, 12 Jun 2024 16:38:20 +0530
From: Taniya Das <quic_tdas@...cinc.com>
To: Bjorn Andersson <andersson@...nel.org>,
Michael Turquette
<mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Konrad Dybcio
<konrad.dybcio@...aro.org>,
Bartosz Golaszewski
<bartosz.golaszewski@...aro.org>,
Shazad Hussain <quic_shazhuss@...cinc.com>
CC: <linux-arm-msm@...r.kernel.org>, <linux-clk@...r.kernel.org>,
<linux-kernel@...r.kernel.org>, <quic_jkona@...cinc.com>,
<quic_imrashai@...cinc.com>, Taniya Das <quic_tdas@...cinc.com>
Subject: [PATCH v2 0/6] Update GCC, GPUCC clock drivers on SA8775P
Update GCC, GPUCC clock controller drivers on SA8775P platform.
Changes in V2:
[PATCH 1/6]: Dropped fixes tag for removing ufs hw ctl clocks
[PATCH 3/6]: Updated commit text on setting FORCE_MEM_CORE_ON
bit for ufs phy ice core clk
[PATCH 4/6]: Updated commit text on removing CLK_IS_CRITICAL
for GPU clocks
Link to V1: https://lore.kernel.org/all/20240531090249.10293-1-quic_tdas@quicinc.com/
Multimedia clock controller patches from above v1 series have
been split to a separate series:
https://lore.kernel.org/lkml/20240612-sa8775p-mm-clock-controllers-v1-0-db295a846ee7@quicinc.com/T/#t
---
Taniya Das (6):
clk: qcom: gcc-sa8775p: Remove support for UFS hw ctl clocks
clk: qcom: gcc-sa8775p: Update the GDSC wait_val fields and flags
clk: qcom: gcc-sa8775p: Set FORCE_MEM_CORE_ON for gcc_ufs_phy_ice_core_clk
clk: qcom: gpucc-sa8775p: Remove the CLK_IS_CRITICAL and ALWAYS_ON flags
clk: qcom: gpucc-sa8775p: Park RCG's clk source at XO during disable
clk: qcom: gpucc-sa8775p: Update wait_val fields for GPU GDSC's
drivers/clk/qcom/gcc-sa8775p.c | 154 ++++++++++++---------------------------
drivers/clk/qcom/gpucc-sa8775p.c | 41 ++++++-----
2 files changed, 66 insertions(+), 129 deletions(-)
---
base-commit: 03d44168cbd7fc57d5de56a3730427db758fc7f6
change-id: 20240612-sa8775p-v2-gcc-gpucc-fixes-ec128d5847e8
Best regards,
--
Taniya Das <quic_tdas@...cinc.com>
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