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Message-ID: <20240612140208.GC1504919@google.com>
Date: Wed, 12 Jun 2024 15:02:08 +0100
From: Lee Jones <lee@...nel.org>
To: Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Florian Fainelli <florian.fainelli@...adcom.com>,
Broadcom internal kernel review list <bcm-kernel-feedback-list@...adcom.com>,
Stefan Wahren <wahrenst@....net>, devicetree@...r.kernel.org,
linux-rpi-kernel@...ts.infradead.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
Bjorn Helgaas <bhelgaas@...gle.com>, linux-pci@...r.kernel.org,
Dave Ertman <david.m.ertman@...el.com>,
Lizhi Hou <lizhi.hou@....com>, clement.leger@...tlin.com
Subject: Re: Raspberry Pi5 - RP1 driver - RFC
On Tue, 11 Jun 2024, Andrea della Porta wrote:
> Hi,
> I'm on the verge of reworking the RP1 driver from downstream in order for it to be
> in good shape for upstream inclusion.
> RP1 is an MFD chipset that acts as a south-bridge PCIe endpoint sporting a pletora
> of subdevices (i.e. Ethernet, USB host controller, I2C, PWM, etc.) whose registers
> are all reachable starting from an offset from the BAR address.
It's less of an MFD and more of an SoC.
Please refrain from implemented entire SoCs in drivers/mfd.
Take a look in drivers/soc and drivers/platform.
--
Lee Jones [李琼斯]
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