| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Date: Thu, 13 Jun 2024 15:21:59 +0530
From: Naresh Solanki <naresh.solanki@...ements.com>
To: Guenter Roeck <linux@...ck-us.net>
Cc: Jean Delvare <jdelvare@...e.com>, linux-hwmon@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v4 2/2] hwmon: (max6639) : Add hwmon attributes for fan
and pwm
Hi Guenter,
On Wed, 12 Jun 2024 at 21:25, Guenter Roeck <linux@...ck-us.net> wrote:
>
> On 6/4/24 05:47, Naresh Solanki wrote:
> > Add attribute for fan & pwm i.e.,
> > fanY_pulse
> > pwmY_freq
> >
> > Signed-off-by: Naresh Solanki <naresh.solanki@...ements.com>
> > ---
> > drivers/hwmon/max6639.c | 74 ++++++++++++++++++++++++++++++++++++++---
> > 1 file changed, 70 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/hwmon/max6639.c b/drivers/hwmon/max6639.c
> > index e2a5210f9f95..6c7eaeeb2a80 100644
> > --- a/drivers/hwmon/max6639.c
> > +++ b/drivers/hwmon/max6639.c
> > @@ -235,6 +235,9 @@ static int max6639_read_fan(struct device *dev, u32 attr, int channel,
> > return res;
> > *fan_val = !!(val & BIT(1 - channel));
> > return 0;
> > + case hwmon_fan_pulses:
> > + *fan_val = data->ppr[channel];
> > + return 0;
> > default:
> > return -EOPNOTSUPP;
> > }
> > @@ -246,6 +249,32 @@ static int max6639_set_ppr(struct max6639_data *data, int channel, u8 ppr)
> > return regmap_write(data->regmap, MAX6639_REG_FAN_PPR(channel), ppr-- << 6);
> > }
> >
> > +static int max6639_write_fan(struct device *dev, u32 attr, int channel,
> > + long val)
> > +{
> > + struct max6639_data *data = dev_get_drvdata(dev);
> > + int err;
> > +
> > + if (IS_ERR(data))
> > + return PTR_ERR(data);
> > +
>
> Unnecessary check.
Ack.
>
> > + switch (attr) {
> > + case hwmon_fan_pulses:
> > + if (val <= 0 || val > 5)
> > + return -EINVAL;
> > +
> > + /* Set Fan pulse per revolution */
> > + err = max6639_set_ppr(data, channel, val);
> > + if (err < 0)
> > + return err;
> > +
> > + data->ppr[channel] = val;
>
> Needs mutex protection to avoid inconsistencies due to concurrent writes.
This is single i2c access. Still we need mutex protection here ?
>
> > + return 0;
> > + default:
> > + return -EOPNOTSUPP;
> > + }
> > +}
> > +
> > static umode_t max6639_fan_is_visible(const void *_data, u32 attr, int channel)
> > {
> > struct max6639_data *data = (struct max6639_data *)_data;
> > @@ -270,6 +299,7 @@ static int max6639_read_pwm(struct device *dev, u32 attr, int channel,
> > struct max6639_data *data = dev_get_drvdata(dev);
> > unsigned int val;
> > int res;
> > + u8 i;
> >
> > if (IS_ERR(data))
> > return PTR_ERR(data);
> > @@ -281,6 +311,21 @@ static int max6639_read_pwm(struct device *dev, u32 attr, int channel,
> > return res;
> > *pwm_val = val * 255 / 120;
> > return 0;
> > + case hwmon_pwm_freq:
> > + res = regmap_read(data->regmap, MAX6639_REG_FAN_CONFIG3(channel), &val);
> > + if (res < 0)
> > + return res;
> > + i = val & MAX6639_FAN_CONFIG3_FREQ_MASK;
> > +
> > + res = regmap_read(data->regmap, MAX6639_REG_GCONFIG, &val);
> > + if (res < 0)
> > + return res;
> > +
> > + if (val & MAX6639_GCONFIG_PWM_FREQ_HI)
> > + i |= 0x4;
>
> This sequence will need to be mutex protected to avoid consistency errors if
> a write happens at the same time.
Ack. Yes, there is multiple access to the device. Will update accordingly.
>
>
> > + i &= 0x7;
> > + *pwm_val = freq_table[i];
> > + return 0;
> > default:
> > return -EOPNOTSUPP;
> > }
> > @@ -291,6 +336,7 @@ static int max6639_write_pwm(struct device *dev, u32 attr, int channel,
> > {
> > struct max6639_data *data = dev_get_drvdata(dev);
> > int err;
> > + u8 i;
> >
> > if (IS_ERR(data))
> > return PTR_ERR(data);
> > @@ -301,6 +347,23 @@ static int max6639_write_pwm(struct device *dev, u32 attr, int channel,
> > err = regmap_write(data->regmap, MAX6639_REG_TARGTDUTY(channel),
> > val * 120 / 255);
> > return err;
> > + case hwmon_pwm_freq:
> > + val = clamp_val(val, 0, 25000);
> > +
> > + i = find_closest(val, freq_table, ARRAY_SIZE(freq_table));
> > +
> > + err = regmap_update_bits(data->regmap, MAX6639_REG_FAN_CONFIG3(channel),
> > + MAX6639_FAN_CONFIG3_FREQ_MASK, i);
> > + if (err < 0)
> > + return err;
> > +
> > + if (i >> 2)
> > + err = regmap_set_bits(data->regmap, MAX6639_REG_GCONFIG,
> > + MAX6639_GCONFIG_PWM_FREQ_HI);
> > + else
> > + err = regmap_clear_bits(data->regmap, MAX6639_REG_GCONFIG,
> > + MAX6639_GCONFIG_PWM_FREQ_HI);
>
> Same as above. In general, every operation with more than a single element
> needs to be mutex protected.
Ack.
Regards,
Naresh
>
> > + return err;
> > default:
> > return -EOPNOTSUPP;
> > }
> > @@ -310,6 +373,7 @@ static umode_t max6639_pwm_is_visible(const void *_data, u32 attr, int channel)
> > {
> > switch (attr) {
> > case hwmon_pwm_input:
> > + case hwmon_pwm_freq:
> > return 0644;
> > default:
> > return 0;
> > @@ -415,6 +479,8 @@ static int max6639_write(struct device *dev, enum hwmon_sensor_types type,
> > u32 attr, int channel, long val)
> > {
> > switch (type) {
> > + case hwmon_fan:
> > + return max6639_write_fan(dev, attr, channel, val);
> > case hwmon_pwm:
> > return max6639_write_pwm(dev, attr, channel, val);
> > case hwmon_temp:
> > @@ -442,11 +508,11 @@ static umode_t max6639_is_visible(const void *data,
> >
> > static const struct hwmon_channel_info * const max6639_info[] = {
> > HWMON_CHANNEL_INFO(fan,
> > - HWMON_F_INPUT | HWMON_F_FAULT,
> > - HWMON_F_INPUT | HWMON_F_FAULT),
> > + HWMON_F_INPUT | HWMON_F_FAULT | HWMON_F_PULSES,
> > + HWMON_F_INPUT | HWMON_F_FAULT | HWMON_F_PULSES),
> > HWMON_CHANNEL_INFO(pwm,
> > - HWMON_PWM_INPUT,
> > - HWMON_PWM_INPUT),
> > + HWMON_PWM_INPUT | HWMON_PWM_FREQ,
> > + HWMON_PWM_INPUT | HWMON_PWM_FREQ),
> > HWMON_CHANNEL_INFO(temp,
> > HWMON_T_INPUT | HWMON_T_FAULT | HWMON_T_MAX | HWMON_T_MAX_ALARM |
> > HWMON_T_CRIT | HWMON_T_CRIT_ALARM | HWMON_T_EMERGENCY |
>
Powered by blists - more mailing lists