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Message-Id: <f9a0d11e-53c7-4a15-a7b3-209da8bcf52d@app.fastmail.com>
Date: Fri, 14 Jun 2024 03:24:47 +0100
From: "Jiaxun Yang" <jiaxun.yang@...goat.com>
To: "Huacai Chen" <chenhuacai@...nel.org>,
"Jianmin Lv" <lvjianmin@...ngson.cn>
Cc: "Xuerui Wang" <kernel@...0n.name>, loongarch@...ts.linux.dev,
linux-kernel@...r.kernel.org,
"stable@...r.kernel.org" <stable@...r.kernel.org>
Subject: Re: [PATCH 2/2] LoongArch: Fix ACPI standard register based S3 support
在2024年6月14日六月 上午3:11,Huacai Chen写道:
> Hi, Jiaxun,
>
> On Fri, Jun 14, 2024 at 12:41 AM Jiaxun Yang <jiaxun.yang@...goat.com> wrote:
>>
>> Most LoongArch 64 machines are using custom "SADR" ACPI extension
>> to perform ACPI S3 sleep. However the standard ACPI way to perform
>> sleep is to write a value to ACPI PM1/SLEEP_CTL register, and this
>> is never supported properly in kernel.
> Maybe our hardware is insane so we need "SADR", if so, this patch may
> break real hardware. What's your opinion, Jianmin?
I understand why your hardware need SADR. Most systems DDR self-refresh
mode needs to be setup by firmware.
There is no chance that it may break real hardware. When firmware supplied
SADR it will always use SADR. The fallback only happens when _S3 method exist
but no SADR supplied, which won't happen on real hardware.
For QEMU we don't have stub firmware but standard compliant SEEP_CTL is
sufficient for entering sleep mode, thus we need this fallback path.
Thanks
>
> Huacai
>
>>
--
- Jiaxun
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