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Date: Sat, 15 Jun 2024 13:41:06 +0100
From: Jonathan Cameron <jic23@...nel.org>
To: David Lechner <dlechner@...libre.com>
Cc: Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, Michael Hennerich
<michael.hennerich@...log.com>, Nuno Sá <nuno.sa@...log.com>,
Jonathan Corbet <corbet@....net>, linux-iio@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-doc@...r.kernel.org
Subject: Re: [PATCH 1/3] dt-bindings: iio: adc: add AD4695 and similar ADCs
On Wed, 12 Jun 2024 14:20:40 -0500
David Lechner <dlechner@...libre.com> wrote:
> Add device tree bindings for AD4695 and similar ADCs.
>
> Signed-off-by: David Lechner <dlechner@...libre.com>
> ---
> .../devicetree/bindings/iio/adc/adi,ad4695.yaml | 297 +++++++++++++++++++++
> MAINTAINERS | 9 +
> 2 files changed, 306 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad4695.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad4695.yaml
> new file mode 100644
> index 000000000000..8ff5bbbbef9f
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad4695.yaml
> @@ -0,0 +1,297 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/iio/adc/adi,ad4695.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Analog Devices Easy Drive Multiplexed SAR Analog to Digital Converters
> +
> +maintainers:
> + - Michael Hennerich <Michael.Hennerich@...log.com>
> + - Nuno Sá <nuno.sa@...log.com>
> +
> +description: |
> + A family of similar multi-channel analog to digital converters with SPI bus.
> +
> + * https://www.analog.com/en/products/ad4695.html
> + * https://www.analog.com/en/products/ad4696.html
> + * https://www.analog.com/en/products/ad4697.html
> + * https://www.analog.com/en/products/ad4698.html
> +
> +$ref: /schemas/spi/spi-peripheral-props.yaml#
> +
> +properties:
> + compatible:
> + oneOf:
> + - enum:
> + - adi,ad4695
> + - adi,ad4697
> + # same chips in WLCSP package with more pins
> + - items:
> + - const: adi,ad4695-wlcsp
> + - const: adi,ad4695
> + - items:
> + - const: adi,ad4697-wlcsp
> + - const: adi,ad4697
> + # same chips with higher max sample rate
> + - items:
> + - const: adi,ad4696
> + - const: adi,ad4695
> + - items:
> + - const: adi,ad4698
> + - const: adi,ad4697
> + # same chips with higher max sample rate in WLCSP package
> + - items:
> + - const: adi,ad4696-wlcsp
> + - const: adi,ad4696
> + - const: adi,ad4695-wlcsp
> + - const: adi,ad4695
> + - items:
> + - const: adi,ad4698-wlcsp
> + - const: adi,ad4698
> + - const: adi,ad4697-wlcsp
> + - const: adi,ad4697
> +
> + reg:
> + maxItems: 1
> +
> + spi-max-frequency:
> + maximum: 80000000
> +
> + spi-cpol: true
> + spi-cpha: true
> +
> + spi-rx-bus-width:
> + minimum: 1
> + maximum: 4
> +
> + avdd-supply:
> + description: A 2.7 V to 5.5 V supply that powers the analog circuitry.
I'm a cynic. Do we care about the supported voltages in this binding doc?
Feels just somewhere we might make a mistake.
> +
> + ldo-in-supply:
> + description: A 2.4 V to 5.5 V supply connected to the internal LDO input.
> +
> + vdd-supply:
> + description: A 1.8V supply that powers the core circuitry.
> +
> + vio-supply:
> + description: A 1.2V to 1.8V supply for the digital inputs and outputs.
> +
> + ref-supply:
> + description: A 2.4 V to 5.1 V supply for the external reference voltage.
> +
> + refin-supply:
> + description: A 2.4 V to 5.1 V supply for the internal reference buffer input.
> +
> + com-supply:
> + description: Common voltage supply for pseudo-differential analog inputs.
These last few have more info in them so definitely good to have the descriptions
> +
> + adi,no-ref-current-limit:
> + $ref: /schemas/types.yaml#/definitions/flag
> + description:
> + When this flag is present, the REF Overvoltage Reduced Current protection
> + is disabled.
> +
> + adi,no-ref-high-z:
> + $ref: /schemas/types.yaml#/definitions/flag
> + description:
> + Enable this flag if the ref-supply requires Reference Input High-Z Mode
> + to be disabled for proper operation.
> +
> + cnv-gpios:
> + description: The Convert Input (CNV). If omitted, CNV is tied to SPI CS.
> + maxItems: 1
> +
> + reset-gpios:
> + description: The Reset Input (RESET). Should be configured GPIO_ACTIVE_LOW.
> + maxItems: 1
> +
> + interrupts:
> + minItems: 1
> + items:
> + - description:
> + Signal coming from the BSY_ALT_GP0 or GP3 pin that indicates a busy
> + condition.
> + - description:
> + Signal coming from the BSY_ALT_GP0 or GP2 pin that indicates an alert
> + condition.
> +
> + interrupt-names:
> + minItems: 1
> + items:
> + - const: busy
> + - const: alert
> +
> + gpio-controller: true
> +
> + "#gpio-cells":
> + const: 2
> + description: |
> + The first cell is the GPn number: 0 to 3.
> + The second cell takes standard GPIO flags.
> +
> + "#address-cells":
> + const: 1
> + "#size-cells":
> + const: 0
> +
> +patternProperties:
> + "^channel@[0-9a-f]$":
> + type: object
> + $ref: adc.yaml
> + unevaluatedProperties: false
> + description:
> + Describes each individual channel. In addition the properties defined
> + below, bipolar from adc.yaml is also supported.
> +
> + properties:
> + reg:
> + maximum: 15
> + description: Input pin number (INx).
I'd drop this description as the pin pairing makes it messy.
If you switch to diff-channels etc, just leave it as a index value not
connected to the pin numbers.
> +
> + adi,pin-pairing:
> + description: |
> + The input pin pairing for the negative input. This can be:
> + - REFGND, normally 0V (single-ended)
> + - COM, normally V_REF/2, see com-supply (pseudo-differential)
> + - For even numbered pins, the next odd numbered pin (differential)
> + $ref: /schemas/types.yaml#/definitions/string
> + enum: [refgnd, com, next]
Next is full on differential, just provide both channels via
diff-channels. You can constrain the particular combinations in the binding.
Refcnd is normal single ended. Probably want to use the new single-channel
property for that as we are mixing differential and single ended channels
so reg is pretty much just an index.
Hmm. For comm we haven't had done a recent binding for a chip with the option
of pseudo differential that is per channel, they've been whole device only.
That feels like it will be common enough we need to support it cleanly
with a 'general' scheme.
Problem is I know someone will have a chip with 2 vincom pins and selecting
between them, so we can't just have pseudo-differential as a boolean and adc.yaml
There are horrible solutions like a magic channel number that changes the
meaning of diff-channels but that's ugly.
Maybe pseudo-differential for now and we have to later we add
pseudo-differential-comm = <0> etc?
> + default: refgnd
> +
> + adi,no-high-z:
> + $ref: /schemas/types.yaml#/definitions/flag
> + description: |
Do we need the | given not really formatted?
> + Enable this flag if the input pin requires the Analog Input High-Z
> + Mode to be disabled for proper operation.
> +
> + required:
> + - reg
> +
> + allOf:
> + # only even number pins can be paired with the next pin
> + - if:
> + properties:
> + reg:
> + not:
> + multipleOf: 2
> + then:
> + properties:
> + adi,pin-pairing:
> + enum: [refgnd, com]
> + # bipolar mode is not supported with REFGND pairing
> + - if:
> + not:
> + required:
> + - adi,pin-pairing
> + then:
> + properties:
> + bipolar: false
> + else:
> + if:
> + properties:
> + adi,pin-pairing:
> + const: refgnd
> + then:
> + properties:
> + bipolar: false
> +
> +required:
> + - compatible
> + - reg
> + - avdd-supply
> + - vio-supply
> +
> +allOf:
> + - oneOf:
> + - required:
> + - ref-supply
> + - required:
> + - refin-supply
> +
> + - oneOf:
> + - required:
> + - ldo-in-supply
> + - required:
> + - vdd-supply
> +
> + # LFSCP package has fewer pins, so a few things are not valid in that case
> + - if:
> + properties:
> + compatible:
> + not:
> + contains:
> + pattern: -wlcsp$
> + then:
> + properties:
> + refin-supply: false
> + spi-rx-bus-width:
> + maximum: 2
> +
> + # the internal reference buffer always requires high-z mode
> + - if:
> + required:
> + - refin-supply
> + then:
> + properties:
> + adi,no-ref-high-z: false
> +
> + # limit channels for 8-channel chips
> + - if:
> + properties:
> + compatible:
> + contains:
> + const: adi,ad4697
> + then:
> + patternProperties:
> + "^channel@[0-7]$":
> + properties:
> + reg:
> + maximum: 7
> + "^channel@[8-9a-f]$": false
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/gpio/gpio.h>
> +
> + spi {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + adc@0 {
> + compatible = "adi,ad4695";
> + reg = <0>;
> + spi-cpol;
> + spi-cpha;
> + spi-max-frequency = <80000000>;
> + avdd-supply = <&supply_2_5V>;
> + vdd-supply = <&supply_1_8V>;
> + vio-supply = <&supply_1_2V>;
> + ref-supply = <&supply_5V>;
> + reset-gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
> +
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + /* Differential channel between IN0 and IN1. */
> + channel@0 {
> + reg = <0>;
> + adi,pin-pairing = "next";
> + bipolar;
> + };
> +
> + /* Single-ended channel between IN2 and REFGND. */
> + channel@2 {
> + reg = <2>;
> + };
> +
> + /* Pseudo-differential channel between IN3 and COM. */
> + channel@f {
> + reg = <3>;
> + adi,pin-pairing = "com";
> + bipolar;
> + };
> + };
> + };
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