linux-kernel - [PATCH fixes 0/4] MIPS: MT ASE fixes

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Message-Id: <20240616-mips-mt-fixes-v1-0-83913e0e60fc@flygoat.com>
Date: Sun, 16 Jun 2024 14:25:01 +0100
From: Jiaxun Yang <jiaxun.yang@...goat.com>
To: Thomas Bogendoerfer <tsbogend@...ha.franken.de>
Cc: linux-mips@...r.kernel.org, linux-kernel@...r.kernel.org, 
 Jiaxun Yang <jiaxun.yang@...goat.com>, stable@...r.kernel.org
Subject: [PATCH fixes 0/4] MIPS: MT ASE fixes

Hi all,

This series fixed multiple problems for MT ASE handling in current
kernel code.

PATCH 1 is critical, although it's not causing problems on MT kernel,
we are risking clobbering register here.

Rest are usual build fixes for adopting toolcahins.

Please apply it to fixes tree.

Thanks.
- Jiaxun

Signed-off-by: Jiaxun Yang <jiaxun.yang@...goat.com>
---
Jiaxun Yang (4):
      MIPS: mipsmtregs: Fix target register for MFTC0
      MIPS: asmmacro: Fix MT ASE macros
      MIPS: cps-vec: Replace MT instructions with macros
      MIPS: Use toolchain MT ASE support whenever possible

 arch/mips/Makefile                 |   2 +
 arch/mips/include/asm/asmmacro.h   | 241 +++++++++++++++++++++++++++++++++----
 arch/mips/include/asm/mipsmtregs.h |  42 ++++++-
 arch/mips/kernel/cps-vec.S         |  62 ++++------
 4 files changed, 287 insertions(+), 60 deletions(-)
---
base-commit: 6906a84c482f098d31486df8dc98cead21cce2d0
change-id: 20240616-mips-mt-fixes-50eb56d2159c

Best regards,
-- 
Jiaxun Yang <jiaxun.yang@...goat.com>