linux-kernel - Re: [PATCH] PCI: Cancel compilation restrictions on function pcie_clear_device

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Message-ID:
 <TY3P286MB2754F489000B7FA6F9CF19D8B4CD2@TY3P286MB2754.JPNP286.PROD.OUTLOOK.COM>
Date: Mon, 17 Jun 2024 21:35:20 +0800
From: Songyang Li <leesongyang@...look.com>
To: helgaas@...nel.org
Cc: bhelgaas@...gle.com,
	leesongyang@...look.com,
	linux-kernel@...r.kernel.org,
	linux-pci@...r.kernel.org
Subject: Re: [PATCH] PCI: Cancel compilation restrictions on function pcie_clear_device_status

On Sat, 15 Jun 2024 16:26:03 -0500, Bjorn Helgaas wrote:
> > On Wed, 12 Jun 2024 15:14:32 -0500, Bjorn Helgaas wrote:
> > > I think all current any callers of pcie_clear_device_status() are also
> > > under CONFIG_PCIEAER, so I don't think this fixes a current problem.
> > > 
> > > As you point out, it might make sense to use
> > > pcie_clear_device_status() even without AER, but I think we should
> > > include this change at the time when we add such a use.
> > > 
> > > If I'm missing a use with the current kernel, let me know.
> > 
> > As far as I know, some PCIe device drivers, for example,
> > [net/ethernet/broadcom/tg3.c],[net/ethernet/atheros/atl1c/atl1c_main.c],
> > which use the following code to clear the device status register,
> > pcie_capability_write_word(tp->pdev, PCI_EXP_DEVSTA,
> >                 PCI_EXP_DEVSTA_CED |
> >                 PCI_EXP_DEVSTA_NFED |
> >                 PCI_EXP_DEVSTA_FED |
> >                 PCI_EXP_DEVSTA_URD);
> > I think it may be more suitable to export the pcie_clear_device_status()
> > for use in the driver code.
> 
> If we want to use this from drivers, it would make sense to do
> something like this patch, and this patch could be part of a series to
> call it from the drivers.
> 
> But at the same time, we should ask whether drivers should be clearing
> this status themselves, or whether it should be done by the PCI core.

After careful consideration, I agree with your point of view.
I hold a viewpoint that it should be done by the PCI core,
rather than pcie drivers. I give up this patch, and then I have
gained a profound understanding of PCIe Core from this communication.
Thanks,

Songyang Li