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Message-Id: <20240617030537.3112356-6-jacobe.zang@wesion.com>
Date: Mon, 17 Jun 2024 11:05:37 +0800
From: Jacobe Zang <jacobe.zang@...ion.com>
To: robh@...nel.org,
krzk+dt@...nel.org,
conor+dt@...nel.org,
heiko@...ech.de
Cc: nick@...das.com,
efectn@...tonmail.com,
jagan@...eble.ai,
dsimic@...jaro.org,
devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
linux-rockchip@...ts.infradead.org,
linux-kernel@...r.kernel.org,
Jacobe Zang <jacobe.zang@...ion.com>
Subject: [PATCH v1 5/5] arm64: dts: rockchip: Add cpufreq support to Khadas Edge2
This adjust CPU nodes on Khadas Edge2.
Signed-off-by: Jacobe Zang <jacobe.zang@...ion.com>
---
.../arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts | 12 ++++++++++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts
index cdd5f124e3069..04796265f4b7e 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts
@@ -160,34 +160,42 @@ vdd_3v3_sd: vdd-3v3-sd-regulator {
&cpu_b0 {
cpu-supply = <&vdd_cpu_big0_s0>;
+ mem-supply = <&vdd_cpu_big0_mem_s0>;
};
&cpu_b1 {
cpu-supply = <&vdd_cpu_big0_s0>;
+ mem-supply = <&vdd_cpu_big0_mem_s0>;
};
&cpu_b2 {
cpu-supply = <&vdd_cpu_big1_s0>;
+ mem-supply = <&vdd_cpu_big1_mem_s0>;
};
&cpu_b3 {
cpu-supply = <&vdd_cpu_big1_s0>;
+ mem-supply = <&vdd_cpu_big1_mem_s0>;
};
&cpu_l0 {
cpu-supply = <&vdd_cpu_lit_s0>;
+ mem-supply = <&vdd_cpu_lit_mem_s0>;
};
&cpu_l1 {
cpu-supply = <&vdd_cpu_lit_s0>;
+ mem-supply = <&vdd_cpu_lit_mem_s0>;
};
&cpu_l2 {
cpu-supply = <&vdd_cpu_lit_s0>;
+ mem-supply = <&vdd_cpu_lit_mem_s0>;
};
&cpu_l3 {
cpu-supply = <&vdd_cpu_lit_s0>;
+ mem-supply = <&vdd_cpu_lit_mem_s0>;
};
&combphy0_ps {
@@ -208,7 +216,7 @@ &i2c0 {
pinctrl-0 = <&i2c0m2_xfer>;
status = "okay";
- vdd_cpu_big0_s0: regulator@42 {
+ vdd_cpu_big0_s0: vdd_cpu_big0_mem_s0: regulator@42 {
compatible = "rockchip,rk8602";
reg = <0x42>;
fcs,suspend-voltage-selector = <1>;
@@ -225,7 +233,7 @@ regulator-state-mem {
};
};
- vdd_cpu_big1_s0: regulator@43 {
+ vdd_cpu_big1_s0: vdd_cpu_big1_mem_s0: regulator@43 {
compatible = "rockchip,rk8603", "rockchip,rk8602";
reg = <0x43>;
fcs,suspend-voltage-selector = <1>;
--
2.34.1
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