linux-kernel - [PATCH v3 0/6] USB31DRD phy support for Google Tensor gs101 (HS & SS)

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Date: Mon, 17 Jun 2024 17:44:41 +0100
From: André Draszik <andre.draszik@...aro.org>
To: Vinod Koul <vkoul@...nel.org>, 
 Kishon Vijay Abraham I <kishon@...nel.org>, Rob Herring <robh@...nel.org>, 
 Krzysztof Kozlowski <krzk+dt@...nel.org>, 
 Conor Dooley <conor+dt@...nel.org>, 
 Peter Griffin <peter.griffin@...aro.org>, 
 Marek Szyprowski <m.szyprowski@...sung.com>, 
 Sylwester Nawrocki <s.nawrocki@...sung.com>, 
 Alim Akhtar <alim.akhtar@...sung.com>, 
 Sam Protsenko <semen.protsenko@...aro.org>
Cc: Krzysztof Kozlowski <krzk@...nel.org>, 
 Tudor Ambarus <tudor.ambarus@...aro.org>, 
 Will McVicker <willmcvicker@...gle.com>, Roy Luo <royluo@...gle.com>, 
 kernel-team@...roid.com, linux-phy@...ts.infradead.org, 
 devicetree@...r.kernel.org, linux-kernel@...r.kernel.org, 
 linux-arm-kernel@...ts.infradead.org, linux-samsung-soc@...r.kernel.org, 
 André Draszik <andre.draszik@...aro.org>
Subject: [PATCH v3 0/6] USB31DRD phy support for Google Tensor gs101 (HS &
 SS)

This patch series adds support for the Exynos USB 3.1 DRD combo phy, as
found in Exynos 9 SoCs like Google GS101. It supports USB SS, HS and
DisplayPort, but DisplayPort is out of scope for this series.

In terms of UTMI+, this is very similar to the existing Exynos850
support in this driver. The difference is that it supports both UTMI+
(HS) and PIPE3 (SS). Firstly, there are some preparatory patches to convert
this driver to using the clk_bulk and regulator_bulk APIs to simplify
addition, while the bulk of the changes is around the SS part.

Dependencies on other patches:
While there is no compile or link time dependency, for USB to actually work
this series also requires Peter's syscon changes from
https://lore.kernel.org/all/20240614140421.3172674-1-peter.griffin@linaro.org/

To: Vinod Koul <vkoul@...nel.org>
To: Kishon Vijay Abraham I <kishon@...nel.org>
To: Rob Herring <robh@...nel.org>
To: Krzysztof Kozlowski <krzk+dt@...nel.org>
To: Conor Dooley <conor+dt@...nel.org>
To: Peter Griffin <peter.griffin@...aro.org>
To: Marek Szyprowski <m.szyprowski@...sung.com>
To: Sylwester Nawrocki <s.nawrocki@...sung.com>
To: Alim Akhtar <alim.akhtar@...sung.com>
To: Sam Protsenko <semen.protsenko@...aro.org>
Cc: Krzysztof Kozlowski <krzk@...nel.org>
Cc: Tudor Ambarus <tudor.ambarus@...aro.org>
Cc: Will McVicker <willmcvicker@...gle.com>
Cc: Roy Luo <royluo@...gle.com>
Cc: kernel-team@...roid.com
Cc: linux-phy@...ts.infradead.org
Cc: devicetree@...r.kernel.org
Cc: linux-kernel@...r.kernel.org
Cc: linux-arm-kernel@...ts.infradead.org
Cc: linux-samsung-soc@...r.kernel.org
Signed-off-by: André Draszik <andre.draszik@...aro.org>

Changes in v3:
- drop patch 'phy: exynos5-usbdrd: use exynos_get_pmu_regmap_by_phandle()
  for PMU regs'. This is not needed anymore with Peter's syscon series
  mentioned above (Krzysztof).
- drop those patches that have already been merged via
  https://lore.kernel.org/all/20240507-samsung-usb-phy-fixes-v1-0-4ccba5afa7cc@linaro.org/
- update device tree binding 'reg-names' (Krzysztof)
- use clk_bulk and regulator_bulk APIs throughout to simplify addition of
  gs101 support as preparatory patches
- patch 1: add required but missing regulators
- patch 4:
    * make the register access clock name(s) platform specific and avoid
      use of devm_clk_bulk_get_optional() as we want to be sure to have
      retrieved all required clocks
    * fix a whitespace issue
    * slightly rephrase commit message
- patch 6:
    * set unused callback pointers to NULL in gs101_tunes[]
    * implement missing regulator support and enable power to phy before any
      register access
    * add more phy tunes
    * move PTS_UTMI_POSTINIT utmi phy tuning to before completion of POR
      sequence, as per datasheet
    * group gs101 related symbols closer to each other 
- Link to v2: https://lore.kernel.org/r/20240501-usb-phy-gs101-v2-0-ed9f14a1bd6d@linaro.org

Changes in v2:
- avoid having nested else/if in the DT binding (Rob)
- add missing bitfield.h include
- Link to v1: https://lore.kernel.org/r/20240423-usb-phy-gs101-v1-0-ebdcb3ac174d@linaro.org

---
André Draszik (6):
      dt-bindings: phy: samsung,usb3-drd-phy: add gs101 compatible
      phy: exynos5-usbdrd: support isolating HS and SS ports independently
      phy: exynos5-usbdrd: convert core clocks to clk_bulk
      phy: exynos5-usbdrd: convert (phy) register access clock to clk_bulk
      phy: exynos5-usbdrd: convert Vbus supplies to regulator_bulk
      phy: exynos5-usbdrd: support Exynos USBDRD 3.1 combo phy (HS & SS)

 .../bindings/phy/samsung,usb3-drd-phy.yaml         |  77 +-
 drivers/phy/samsung/phy-exynos5-usbdrd.c           | 958 +++++++++++++++++----
 include/linux/soc/samsung/exynos-regs-pmu.h        |   4 +
 3 files changed, 893 insertions(+), 146 deletions(-)
---
base-commit: 6906a84c482f098d31486df8dc98cead21cce2d0
change-id: 20240423-usb-phy-gs101-abf3e172d1c4

Best regards,
-- 
André Draszik <andre.draszik@...aro.org>