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Message-ID: <20240617200411.1426554-10-terry.bowman@amd.com>
Date: Mon, 17 Jun 2024 15:04:11 -0500
From: Terry Bowman <terry.bowman@....com>
To: <dan.j.williams@...el.com>, <ira.weiny@...el.com>, <dave@...olabs.net>,
<dave.jiang@...el.com>, <alison.schofield@...el.com>, <ming4.li@...el.com>,
<vishal.l.verma@...el.com>, <jim.harris@...sung.com>,
<ilpo.jarvinen@...ux.intel.com>, <ardb@...nel.org>,
<sathyanarayanan.kuppuswamy@...ux.intel.com>, <linux-cxl@...r.kernel.org>,
<linux-kernel@...r.kernel.org>, <terry.bowman@....com>,
<Yazen.Ghannam@....com>, <Robert.Richter@....com>
Subject: [RFC PATCH 9/9] cxl/pci: Enable interrupts for CXL PCIe ports' AER internal errors
CXL RAS errors are reported through AER interrupts using the AER status:
correctbale internal errors (CIE) and AER uncorrectable internal errors
(UIE).[1] But, the AER CIE/UIE are disabled by default preventing
notification of CXL RAS errors.[2]
Enable CXL PCIe port RAS notification by unmasking the ports' AER CIE
and UIE errors.
[1] CXL3.1 - 12.2.2 CXL Root Ports, Downstream Switch Ports, and Upstream
Switch Ports
[2] PCI6.0 - 7.8.4.3 Uncorrectable Error Mask Register (Offset 08h),
7.8.4.6 Correctable Error Mask Register (Offset 14h)
Signed-off-by: Terry Bowman <terry.bowman@....com>
---
drivers/cxl/core/pci.c | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/drivers/cxl/core/pci.c b/drivers/cxl/core/pci.c
index e630eccb733d..73637d39df0a 100644
--- a/drivers/cxl/core/pci.c
+++ b/drivers/cxl/core/pci.c
@@ -861,6 +861,12 @@ void cxl_setup_parent_uport(struct device *host, struct cxl_port *port)
struct device *uport_dev = port->uport_dev;
cxl_port_map_regs(uport_dev, map, regs);
+
+ if (dev_is_pci(uport_dev)) {
+ struct pci_dev *pdev = to_pci_dev(uport_dev);
+
+ pci_aer_unmask_internal_errors(pdev);
+ }
}
EXPORT_SYMBOL_NS_GPL(cxl_setup_parent_uport, CXL);
@@ -878,6 +884,12 @@ void cxl_setup_parent_dport(struct device *host, struct cxl_dport *dport)
if (dport->rch)
cxl_disable_rch_root_ints(dport);
+
+ if (dev_is_pci(dport_dev)) {
+ struct pci_dev *pdev = to_pci_dev(dport_dev);
+
+ pci_aer_unmask_internal_errors(pdev);
+ }
}
EXPORT_SYMBOL_NS_GPL(cxl_setup_parent_dport, CXL);
--
2.34.1
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