linux-kernel - Re: [PATCH 02/13] clk: rockchip: Set parent rate for DCLK

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Message-ID: <19757196.sIn9rWBj0N@diego>
Date: Mon, 17 Jun 2024 22:30:25 +0200
From: Heiko Stübner <heiko@...ech.de>
To: dri-devel@...ts.freedesktop.org,
 Michael Turquette <mturquette@...libre.com>, Stephen Boyd <sboyd@...nel.org>,
 Yakir Yang <kuankuan.y@...il.com>, Jeffy Chen <jeffy.chen@...k-chips.com>,
 Jonas Karlman <jonas@...boo.se>
Cc: linux-arm-kernel@...ts.infradead.org, linux-rockchip@...ts.infradead.org,
 linux-kernel@...r.kernel.org, Jonas Karlman <jonas@...boo.se>,
 linux-clk@...r.kernel.org
Subject:
 Re: [PATCH 02/13] clk: rockchip: Set parent rate for DCLK_VOP clock on RK3228

Am Samstag, 15. Juni 2024, 19:03:53 CEST schrieb Jonas Karlman:
> Similar to DCLK_LCDC on RK3328, the DCLK_VOP on RK3228 is typically
> parented by the hdmiphy clk and it is expected that the DCLK_VOP and
> hdmiphy clk rate are kept in sync.
> 
> Use CLK_SET_RATE_PARENT and CLK_SET_RATE_NO_REPARENT flags, same as used
> on RK3328, to make full use of all possible supported display modes.
> 
> Fixes: 0a9d4ac08ebc ("clk: rockchip: set the clock ids for RK3228 VOP")
> Fixes: 307a2e9ac524 ("clk: rockchip: add clock controller for rk3228")
> Signed-off-by: Jonas Karlman <jonas@...boo.se>

did your mailer have a hickup? Somehow I got patch2 (only this one)
2 times