lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date: Mon, 17 Jun 2024 10:39:02 +0200
From: Borislav Petkov <bp@...en8.de>
To: Perry Yuan <perry.yuan@....com>
Cc: rafael.j.wysocki@...el.com, Mario.Limonciello@....com,
	viresh.kumar@...aro.org, Ray.Huang@....com, gautham.shenoy@....com,
	Alexander.Deucher@....com, Xinmei.Huang@....com,
	Xiaojian.Du@....com, Li.Meng@....com, linux-pm@...r.kernel.org,
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH v4 08/11] x86/cpufeatures: Add feature bits for AMD
 heterogeneous processor

On Mon, Jun 17, 2024 at 02:59:10PM +0800, Perry Yuan wrote:
> CPUID leaf 0x80000026 advertises core types with different efficiency rankings
> 
> Bit 30 indicates the heterogeneous core topology feature, if the bit
> set, it means not all instances at the current hierarchical level have
> the same core topology.
> 
> For better utilization of feature words and help to identify core type,
> X86_FEATURE_HETERO_CORE_TOPOLOGY is added as a few scattered feature bits.
> 
> Reference:
> See the page 119 of PPR for AMD Family 19h Model 61h B1, docID 56713
> 
> Signed-off-by: Perry Yuan <perry.yuan@....com>
> ---
>  arch/x86/include/asm/cpufeatures.h | 1 +
>  arch/x86/kernel/cpu/scattered.c    | 1 +
>  2 files changed, 2 insertions(+)
> 
> diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
> index 6c128d463a14..eceaa0df0137 100644
> --- a/arch/x86/include/asm/cpufeatures.h
> +++ b/arch/x86/include/asm/cpufeatures.h
> @@ -471,6 +471,7 @@
>  #define X86_FEATURE_CLEAR_BHB_HW	(21*32+ 3) /* "" BHI_DIS_S HW control enabled */
>  #define X86_FEATURE_CLEAR_BHB_LOOP_ON_VMEXIT (21*32+ 4) /* "" Clear branch history at vmexit using SW loop */
>  #define X86_FEATURE_FAST_CPPC		(21*32 + 5) /* "" AMD Fast CPPC */
> +#define X86_FEATURE_HETERO_CORE_TOPOLOGY       (21*32+ 6) /* "" Heterogeneous Core Topology */
>  
>  /*
>   * BUG word(s)
> diff --git a/arch/x86/kernel/cpu/scattered.c b/arch/x86/kernel/cpu/scattered.c
> index c84c30188fdf..6b3477503dd0 100644
> --- a/arch/x86/kernel/cpu/scattered.c
> +++ b/arch/x86/kernel/cpu/scattered.c
> @@ -52,6 +52,7 @@ static const struct cpuid_bit cpuid_bits[] = {
>  	{ X86_FEATURE_PERFMON_V2,	CPUID_EAX,  0, 0x80000022, 0 },
>  	{ X86_FEATURE_AMD_LBR_V2,	CPUID_EAX,  1, 0x80000022, 0 },
>  	{ X86_FEATURE_AMD_LBR_PMC_FREEZE,	CPUID_EAX,  2, 0x80000022, 0 },
> +	{ X86_FEATURE_HETERO_CORE_TOPOLOGY,     CPUID_EAX,  30, 0x80000026, 0 },
>  	{ 0, 0, 0, 0, 0 }
>  };
>  
> -- 

Nacked-by: Borislav Petkov (AMD) <bp@...en8.de>

Until all review comments have been addressed:

https://lore.kernel.org/r/20240611105216.GAZmgsYC-J_yLfdupF@fat_crate.local

-- 
Regards/Gruss,
    Boris.

https://people.kernel.org/tglx/notes-about-netiquette

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ