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Message-ID: <14d5ed1b-db72-4676-bce2-1ff3637a7e56@citrix.com>
Date: Mon, 17 Jun 2024 10:38:32 +0100
From: Andrew Cooper <andrew.cooper3@...rix.com>
To: Pawan Gupta <pawan.kumar.gupta@...ux.intel.com>,
Thomas Gleixner <tglx@...utronix.de>, Ingo Molnar <mingo@...hat.com>,
Borislav Petkov <bp@...en8.de>, Dave Hansen <dave.hansen@...ux.intel.com>,
x86@...nel.org
Cc: daniel.sneddon@...ux.intel.com, tony.luck@...el.com,
linux-kernel@...r.kernel.org, linux-pm@...r.kernel.org,
linux-perf-users@...r.kernel.org, Josh Poimboeuf <jpoimboe@...nel.org>,
Srinivas Pandruvada <srinivas.pandruvada@...ux.intel.com>,
"Rafael J. Wysocki" <rafael@...nel.org>,
Ricardo Neri <ricardo.neri-calderon@...ux.intel.com>,
"Liang, Kan" <kan.liang@...ux.intel.com>
Subject: Re: [PATCH PATCH 8/9] x86/bugs: Declutter vulnerable CPU list
On 17/06/2024 10:12 am, Pawan Gupta wrote:
> diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
> index d4e539d4e158..7e3b09b0f82c 100644
> --- a/arch/x86/kernel/cpu/common.c
> +++ b/arch/x86/kernel/cpu/common.c
> @@ -1229,43 +1232,45 @@ static const __initconst struct x86_cpu_id cpu_vuln_whitelist[] = {
> #define RFDS BIT(7)
>
> static const struct x86_cpu_id cpu_vuln_blacklist[] __initconst = {
> - VULNBL_INTEL_STEPPINGS(INTEL_IVYBRIDGE, X86_STEPPING_ANY, SRBDS),
> - VULNBL_INTEL_STEPPINGS(INTEL_HASWELL, X86_STEPPING_ANY, SRBDS),
> - VULNBL_INTEL_STEPPINGS(INTEL_HASWELL_L, X86_STEPPING_ANY, SRBDS),
> - VULNBL_INTEL_STEPPINGS(INTEL_HASWELL_G, X86_STEPPING_ANY, SRBDS),
> - VULNBL_INTEL_STEPPINGS(INTEL_HASWELL_X, X86_STEPPING_ANY, MMIO),
> - VULNBL_INTEL_STEPPINGS(INTEL_BROADWELL_D, X86_STEPPING_ANY, MMIO),
> - VULNBL_INTEL_STEPPINGS(INTEL_BROADWELL_G, X86_STEPPING_ANY, SRBDS),
> - VULNBL_INTEL_STEPPINGS(INTEL_BROADWELL_X, X86_STEPPING_ANY, MMIO),
> - VULNBL_INTEL_STEPPINGS(INTEL_BROADWELL, X86_STEPPING_ANY, SRBDS),
> - VULNBL_INTEL_STEPPINGS(INTEL_SKYLAKE_X, X86_STEPPING_ANY, MMIO | RETBLEED | GDS),
> - VULNBL_INTEL_STEPPINGS(INTEL_SKYLAKE_L, X86_STEPPING_ANY, MMIO | RETBLEED | GDS | SRBDS),
> - VULNBL_INTEL_STEPPINGS(INTEL_SKYLAKE, X86_STEPPING_ANY, MMIO | RETBLEED | GDS | SRBDS),
> - VULNBL_INTEL_STEPPINGS(INTEL_KABYLAKE_L, X86_STEPPING_ANY, MMIO | RETBLEED | GDS | SRBDS),
> - VULNBL_INTEL_STEPPINGS(INTEL_KABYLAKE, X86_STEPPING_ANY, MMIO | RETBLEED | GDS | SRBDS),
> - VULNBL_INTEL_STEPPINGS(INTEL_CANNONLAKE_L, X86_STEPPING_ANY, RETBLEED),
> - VULNBL_INTEL_STEPPINGS(INTEL_ICELAKE_L, X86_STEPPING_ANY, MMIO | MMIO_SBDS | RETBLEED | GDS),
> - VULNBL_INTEL_STEPPINGS(INTEL_ICELAKE_D, X86_STEPPING_ANY, MMIO | GDS),
> - VULNBL_INTEL_STEPPINGS(INTEL_ICELAKE_X, X86_STEPPING_ANY, MMIO | GDS),
> - VULNBL_INTEL_STEPPINGS(INTEL_COMETLAKE, X86_STEPPING_ANY, MMIO | MMIO_SBDS | RETBLEED | GDS),
> - VULNBL_INTEL_STEPPINGS(INTEL_COMETLAKE_L, X86_STEPPINGS(0x0, 0x0), MMIO | RETBLEED),
> - VULNBL_INTEL_STEPPINGS(INTEL_COMETLAKE_L, X86_STEPPING_ANY, MMIO | MMIO_SBDS | RETBLEED | GDS),
> - VULNBL_INTEL_STEPPINGS(INTEL_TIGERLAKE_L, X86_STEPPING_ANY, GDS),
> - VULNBL_INTEL_STEPPINGS(INTEL_TIGERLAKE, X86_STEPPING_ANY, GDS),
> - VULNBL_INTEL_STEPPINGS(INTEL_LAKEFIELD, X86_STEPPING_ANY, MMIO | MMIO_SBDS | RETBLEED),
> - VULNBL_INTEL_STEPPINGS(INTEL_ROCKETLAKE, X86_STEPPING_ANY, MMIO | RETBLEED | GDS),
> - VULNBL_INTEL_STEPPINGS(INTEL_ALDERLAKE, X86_STEPPING_ANY, RFDS),
> - VULNBL_INTEL_STEPPINGS(INTEL_ALDERLAKE_L, X86_STEPPING_ANY, RFDS),
> - VULNBL_INTEL_STEPPINGS(INTEL_RAPTORLAKE, X86_STEPPING_ANY, RFDS),
> - VULNBL_INTEL_STEPPINGS(INTEL_RAPTORLAKE_P, X86_STEPPING_ANY, RFDS),
> - VULNBL_INTEL_STEPPINGS(INTEL_RAPTORLAKE_S, X86_STEPPING_ANY, RFDS),
> - VULNBL_INTEL_STEPPINGS(INTEL_ATOM_GRACEMONT, X86_STEPPING_ANY, RFDS),
> - VULNBL_INTEL_STEPPINGS(INTEL_ATOM_TREMONT, X86_STEPPING_ANY, MMIO | MMIO_SBDS | RFDS),
> - VULNBL_INTEL_STEPPINGS(INTEL_ATOM_TREMONT_D, X86_STEPPING_ANY, MMIO | RFDS),
> - VULNBL_INTEL_STEPPINGS(INTEL_ATOM_TREMONT_L, X86_STEPPING_ANY, MMIO | MMIO_SBDS | RFDS),
> - VULNBL_INTEL_STEPPINGS(INTEL_ATOM_GOLDMONT, X86_STEPPING_ANY, RFDS),
> - VULNBL_INTEL_STEPPINGS(INTEL_ATOM_GOLDMONT_D, X86_STEPPING_ANY, RFDS),
> - VULNBL_INTEL_STEPPINGS(INTEL_ATOM_GOLDMONT_PLUS, X86_STEPPING_ANY, RFDS),
> + VULNBL_INTEL(IVYBRIDGE, SRBDS),
> + VULNBL_INTEL(HASWELL, SRBDS),
> + VULNBL_INTEL(HASWELL_L, SRBDS),
> + VULNBL_INTEL(HASWELL_G, SRBDS),
> + VULNBL_INTEL(HASWELL_X, MMIO),
> + VULNBL_INTEL(BROADWELL_D, MMIO),
> + VULNBL_INTEL(BROADWELL_G, SRBDS),
> + VULNBL_INTEL(BROADWELL_X, MMIO),
> + VULNBL_INTEL(BROADWELL, SRBDS),
> + VULNBL_INTEL(SKYLAKE_X, MMIO | RETBLEED | GDS),
> + VULNBL_INTEL(SKYLAKE_L, MMIO | RETBLEED | GDS | SRBDS),
> + VULNBL_INTEL(SKYLAKE, MMIO | RETBLEED | GDS | SRBDS),
> + VULNBL_INTEL(KABYLAKE_L, MMIO | RETBLEED | GDS | SRBDS),
> + VULNBL_INTEL(KABYLAKE, MMIO | RETBLEED | GDS | SRBDS),
> + VULNBL_INTEL(CANNONLAKE_L, RETBLEED),
> + VULNBL_INTEL(ICELAKE_L, MMIO | MMIO_SBDS | RETBLEED | GDS),
> + VULNBL_INTEL(ICELAKE_D, MMIO | GDS),
> + VULNBL_INTEL(ICELAKE_X, MMIO | GDS),
> + VULNBL_INTEL(COMETLAKE, MMIO | MMIO_SBDS | RETBLEED | GDS),
> + VULNBL_INTEL(TIGERLAKE_L, GDS),
> + VULNBL_INTEL(TIGERLAKE, GDS),
> + VULNBL_INTEL(LAKEFIELD, MMIO | MMIO_SBDS | RETBLEED),
> + VULNBL_INTEL(ROCKETLAKE, MMIO | RETBLEED | GDS),
> + VULNBL_INTEL(ALDERLAKE, RFDS),
> + VULNBL_INTEL(ALDERLAKE_L, RFDS),
> + VULNBL_INTEL(RAPTORLAKE, RFDS),
> + VULNBL_INTEL(RAPTORLAKE_P, RFDS),
> + VULNBL_INTEL(RAPTORLAKE_S, RFDS),
> + VULNBL_INTEL(ATOM_GRACEMONT, RFDS),
> + VULNBL_INTEL(ATOM_TREMONT, MMIO | MMIO_SBDS | RFDS),
> + VULNBL_INTEL(ATOM_TREMONT_D, MMIO | RFDS),
> + VULNBL_INTEL(ATOM_TREMONT_L, MMIO | MMIO_SBDS | RFDS),
> + VULNBL_INTEL(ATOM_GOLDMONT, RFDS),
> + VULNBL_INTEL(ATOM_GOLDMONT_D, RFDS),
> + VULNBL_INTEL(ATOM_GOLDMONT_PLUS, RFDS),
Take the opportunity to realign and fix this ?
~Andrew
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