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Message-ID: <20240618-crushed-courier-87d55930c377@spud>
Date: Tue, 18 Jun 2024 16:07:34 +0100
From: Conor Dooley <conor@...nel.org>
To: Alisa-Dariana Roman <alisadariana@...il.com>
Cc: Alisa-Dariana Roman <alisa.roman@...log.com>,
Jonathan Cameron <Jonathan.Cameron@...wei.com>,
Michael Hennerich <michael.hennerich@...log.com>,
linux-iio@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, Lars-Peter Clausen <lars@...afoo.de>,
Jonathan Cameron <jic23@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Liam Girdwood <lgirdwood@...il.com>,
Mark Brown <broonie@...nel.org>
Subject: Re: [PATCH v5 2/6] dt-bindings: iio: adc: ad7192: Update clock config
On Tue, Jun 18, 2024 at 05:21:34PM +0300, Alisa-Dariana Roman wrote:
> There are actually 4 configuration modes of clock source for AD719X
> devices. Either a crystal can be attached externally between MCLK1 and
> MCLK2 pins, or an external CMOS-compatible clock can drive the MCLK2
> pin. The other 2 modes make use of the 4.92MHz internal clock.
>
> To configure external clock as either a crystal or a CMOS-compatible
> clock, changing the register settings is necessary. Therefore, add clock
> name xtal alongside mclk. By selecting one or the other, the register is
> configured.
>
> The presence of an external clock source is optional, not required. When
> absent, internal clock is used. Modify required property accordingly.
Reviewed-by: Conor Dooley <conor.dooley@...rochip.com>
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