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Message-ID: <20240618035122.438822-1-srinivas.pandruvada@linux.intel.com>
Date: Mon, 17 Jun 2024 20:51:19 -0700
From: Srinivas Pandruvada <srinivas.pandruvada@...ux.intel.com>
To: rafael@...nel.org,
viresh.kumar@...aro.org,
tglx@...utronix.de,
mingo@...hat.com,
bp@...en8.de,
dave.hansen@...ux.intel.com,
hpa@...or.com
Cc: linux-pm@...r.kernel.org,
linux-kernel@...r.kernel.org,
x86@...nel.org,
Srinivas Pandruvada <srinivas.pandruvada@...ux.intel.com>
Subject: [PATCH 0/2] Update highest frequency of a CPU after boot
Intel Xeon servers, which are capable of dynamic performance changes,
are unable to achieve the highest frequency when the performance profile
is changed.
The highest frequency at which a CPU can operate is not fixed and can
vary after the system boots. These changes can be initiated by switching
to different performance profiles using the Intel Speed Select Technology
interface. Additionally, adjustments can be made remotely through a BMC
(Baseboard Management Controller) interface. Administrators can select
various performance profiles to align with specific performance
requirements, as these choices will directly influence the total power
consumption and cooling requirements.
Whenever an administrator switches to a different performance profile that
alters the highest frequency, the hardware sends an interrupt and update
the new highest frequency at which the system can operate. This interrupt
can be enabled via the MSR_HWP_INTERRUPT register, and only if support is
indicated by the CPUID[6].EAX[15] = 1.
To enable changes to the highest frequency, add a CPU features flag and
enable the HWP (Hardware P-states) highest performance change interrupt
when it is supported by the CPU.
Srinivas Pandruvada (2):
x86/cpufeatures: Add HWP highest perf change feature flag
cpufreq: intel_pstate: Support highest performance change interrupt
arch/x86/include/asm/cpufeatures.h | 1 +
drivers/cpufreq/intel_pstate.c | 23 +++++++++++++++++++----
2 files changed, 20 insertions(+), 4 deletions(-)
--
2.44.0
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