linux-kernel - Re: [PATCH 4/7] hwrng: exynos: Implement bus clock control

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Date: Tue, 18 Jun 2024 09:56:19 +0530
From: Anand Moon <linux.amoon@...il.com>
To: Sam Protsenko <semen.protsenko@...aro.org>
Cc: Łukasz Stelmach <l.stelmach@...sung.com>, 
	Krzysztof Kozlowski <krzk+dt@...nel.org>, Rob Herring <robh@...nel.org>, Conor Dooley <conor+dt@...nel.org>, 
	Olivia Mackall <olivia@...enic.com>, Herbert Xu <herbert@...dor.apana.org.au>, 
	Alim Akhtar <alim.akhtar@...sung.com>, linux-samsung-soc@...r.kernel.org, 
	linux-crypto@...r.kernel.org, devicetree@...r.kernel.org, 
	linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 4/7] hwrng: exynos: Implement bus clock control

Hi Sam,

On Tue, 18 Jun 2024 at 06:08, Sam Protsenko <semen.protsenko@...aro.org> wrote:
>
> Some SoCs like Exynos850 might require the SSS bus clock (PCLK) to be
> enabled in order to access TRNG registers. Add and handle optional PCLK
> clock accordingly to make it possible.
>
> Signed-off-by: Sam Protsenko <semen.protsenko@...aro.org>
> ---
>  drivers/char/hw_random/exynos-trng.c | 22 ++++++++++++++++++++--
>  1 file changed, 20 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/char/hw_random/exynos-trng.c b/drivers/char/hw_random/exynos-trng.c
> index 88a5088ed34d..4520a280134c 100644
> --- a/drivers/char/hw_random/exynos-trng.c
> +++ b/drivers/char/hw_random/exynos-trng.c
> @@ -47,7 +47,8 @@
>  struct exynos_trng_dev {
>         struct device   *dev;
>         void __iomem    *mem;
> -       struct clk      *clk;
> +       struct clk      *clk;   /* operating clock */
> +       struct clk      *pclk;  /* bus clock */
>         struct hwrng    rng;
>  };
>
> @@ -141,10 +142,23 @@ static int exynos_trng_probe(struct platform_device *pdev)
>                 goto err_clock;
>         }
>
> +       trng->pclk = devm_clk_get_optional(&pdev->dev, "pclk");

Use devm_clk_get_optional_enabled to avoid clk_prepare_enable

> +       if (IS_ERR(trng->pclk)) {
> +               ret = dev_err_probe(&pdev->dev, PTR_ERR(trng->pclk),
> +                                   "cannot get pclk");
> +               goto err_clock;
> +       }
> +
> +       ret = clk_prepare_enable(trng->pclk);
> +       if (ret) {
> +               dev_err(&pdev->dev, "Could not enable the pclk.\n");
> +               goto err_clock;
> +       }
> +
>         ret = clk_prepare_enable(trng->clk);

Use devm_clk_get_enabled for this clock

>         if (ret) {
>                 dev_err(&pdev->dev, "Could not enable the clk.\n");
> -               goto err_clock;
> +               goto err_clock_enable;
>         }
>
>         ret = devm_hwrng_register(&pdev->dev, &trng->rng);
> @@ -160,6 +174,9 @@ static int exynos_trng_probe(struct platform_device *pdev)
>  err_register:
>         clk_disable_unprepare(trng->clk);
>
> +err_clock_enable:
> +       clk_disable_unprepare(trng->pclk);
> +
>  err_clock:
>         pm_runtime_put_noidle(&pdev->dev);
>
> @@ -174,6 +191,7 @@ static void exynos_trng_remove(struct platform_device *pdev)
>         struct exynos_trng_dev *trng = platform_get_drvdata(pdev);
>
>         clk_disable_unprepare(trng->clk);
> +       clk_disable_unprepare(trng->pclk);
>
>         pm_runtime_put_sync(&pdev->dev);
>         pm_runtime_disable(&pdev->dev);
> --
> 2.39.2
>
>

Thanks
-Anand